1 | // Copyright 2013 the V8 project authors. All rights reserved. |
2 | // Use of this source code is governed by a BSD-style license that can be |
3 | // found in the LICENSE file. |
4 | |
5 | #include "src/base/cpu.h" |
6 | |
7 | #if V8_LIBC_MSVCRT |
8 | #include <intrin.h> // __cpuid() |
9 | #endif |
10 | #if V8_OS_LINUX |
11 | #include <linux/auxvec.h> // AT_HWCAP |
12 | #endif |
13 | #if V8_GLIBC_PREREQ(2, 16) |
14 | #include <sys/auxv.h> // getauxval() |
15 | #endif |
16 | #if V8_OS_QNX |
17 | #include <sys/syspage.h> // cpuinfo |
18 | #endif |
19 | #if V8_OS_LINUX && V8_HOST_ARCH_PPC |
20 | #include <elf.h> |
21 | #endif |
22 | #if V8_OS_AIX |
23 | #include <sys/systemcfg.h> // _system_configuration |
24 | #ifndef POWER_8 |
25 | #define POWER_8 0x10000 |
26 | #endif |
27 | #ifndef POWER_9 |
28 | #define POWER_9 0x20000 |
29 | #endif |
30 | #endif |
31 | #if V8_OS_POSIX |
32 | #include <unistd.h> // sysconf() |
33 | #endif |
34 | |
35 | #include <ctype.h> |
36 | #include <limits.h> |
37 | #include <stdio.h> |
38 | #include <stdlib.h> |
39 | #include <string.h> |
40 | #include <algorithm> |
41 | |
42 | #include "src/base/logging.h" |
43 | #if V8_OS_WIN |
44 | #include "src/base/win32-headers.h" // NOLINT |
45 | #endif |
46 | |
47 | namespace v8 { |
48 | namespace base { |
49 | |
50 | #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 |
51 | |
52 | // Define __cpuid() for non-MSVC libraries. |
53 | #if !V8_LIBC_MSVCRT |
54 | |
55 | static V8_INLINE void __cpuid(int cpu_info[4], int info_type) { |
56 | // Clear ecx to align with __cpuid() of MSVC: |
57 | // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx |
58 | #if defined(__i386__) && defined(__pic__) |
59 | // Make sure to preserve ebx, which contains the pointer |
60 | // to the GOT in case we're generating PIC. |
61 | __asm__ volatile( |
62 | "mov %%ebx, %%edi\n\t" |
63 | "cpuid\n\t" |
64 | "xchg %%edi, %%ebx\n\t" |
65 | : "=a" (cpu_info[0]), "=D" (cpu_info[1]), "=c" (cpu_info[2]), |
66 | "=d" (cpu_info[3]) |
67 | : "a" (info_type), "c" (0)); |
68 | #else |
69 | __asm__ volatile("cpuid \n\t" |
70 | : "=a" (cpu_info[0]), "=b" (cpu_info[1]), "=c" (cpu_info[2]), |
71 | "=d" (cpu_info[3]) |
72 | : "a" (info_type), "c" (0)); |
73 | #endif // defined(__i386__) && defined(__pic__) |
74 | } |
75 | |
76 | #endif // !V8_LIBC_MSVCRT |
77 | |
78 | #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 |
79 | |
80 | #if V8_OS_LINUX |
81 | |
82 | #if V8_HOST_ARCH_ARM |
83 | |
84 | // See <uapi/asm/hwcap.h> kernel header. |
85 | /* |
86 | * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP |
87 | */ |
88 | #define HWCAP_SWP (1 << 0) |
89 | #define HWCAP_HALF (1 << 1) |
90 | #define HWCAP_THUMB (1 << 2) |
91 | #define HWCAP_26BIT (1 << 3) /* Play it safe */ |
92 | #define HWCAP_FAST_MULT (1 << 4) |
93 | #define HWCAP_FPA (1 << 5) |
94 | #define HWCAP_VFP (1 << 6) |
95 | #define HWCAP_EDSP (1 << 7) |
96 | #define HWCAP_JAVA (1 << 8) |
97 | #define HWCAP_IWMMXT (1 << 9) |
98 | #define HWCAP_CRUNCH (1 << 10) |
99 | #define HWCAP_THUMBEE (1 << 11) |
100 | #define HWCAP_NEON (1 << 12) |
101 | #define HWCAP_VFPv3 (1 << 13) |
102 | #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ |
103 | #define HWCAP_TLS (1 << 15) |
104 | #define HWCAP_VFPv4 (1 << 16) |
105 | #define HWCAP_IDIVA (1 << 17) |
106 | #define HWCAP_IDIVT (1 << 18) |
107 | #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ |
108 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
109 | #define HWCAP_LPAE (1 << 20) |
110 | |
111 | static uint32_t ReadELFHWCaps() { |
112 | uint32_t result = 0; |
113 | #if V8_GLIBC_PREREQ(2, 16) |
114 | result = static_cast<uint32_t>(getauxval(AT_HWCAP)); |
115 | #else |
116 | // Read the ELF HWCAP flags by parsing /proc/self/auxv. |
117 | FILE* fp = fopen("/proc/self/auxv" , "r" ); |
118 | if (fp != nullptr) { |
119 | struct { uint32_t tag; uint32_t value; } entry; |
120 | for (;;) { |
121 | size_t n = fread(&entry, sizeof(entry), 1, fp); |
122 | if (n == 0 || (entry.tag == 0 && entry.value == 0)) { |
123 | break; |
124 | } |
125 | if (entry.tag == AT_HWCAP) { |
126 | result = entry.value; |
127 | break; |
128 | } |
129 | } |
130 | fclose(fp); |
131 | } |
132 | #endif |
133 | return result; |
134 | } |
135 | |
136 | #endif // V8_HOST_ARCH_ARM |
137 | |
138 | #if V8_HOST_ARCH_MIPS |
139 | int __detect_fp64_mode(void) { |
140 | double result = 0; |
141 | // Bit representation of (double)1 is 0x3FF0000000000000. |
142 | __asm__ volatile( |
143 | ".set push\n\t" |
144 | ".set noreorder\n\t" |
145 | ".set oddspreg\n\t" |
146 | "lui $t0, 0x3FF0\n\t" |
147 | "ldc1 $f0, %0\n\t" |
148 | "mtc1 $t0, $f1\n\t" |
149 | "sdc1 $f0, %0\n\t" |
150 | ".set pop\n\t" |
151 | : "+m" (result) |
152 | : |
153 | : "t0" , "$f0" , "$f1" , "memory" ); |
154 | |
155 | return !(result == 1); |
156 | } |
157 | |
158 | |
159 | int __detect_mips_arch_revision(void) { |
160 | // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips |
161 | // kernel. |
162 | uint32_t result = 0; |
163 | __asm__ volatile( |
164 | "move $v0, $zero\n\t" |
165 | // Encoding for "addi $v0, $v0, 1" on non-r6, |
166 | // which is encoding for "bovc $v0, %v0, 1" on r6. |
167 | // Use machine code directly to avoid compilation errors with different |
168 | // toolchains and maintain compatibility. |
169 | ".word 0x20420001\n\t" |
170 | "sw $v0, %0\n\t" |
171 | : "=m" (result) |
172 | : |
173 | : "v0" , "memory" ); |
174 | // Result is 0 on r6 architectures, 1 on other architecture revisions. |
175 | // Fall-back to the least common denominator which is mips32 revision 1. |
176 | return result ? 1 : 6; |
177 | } |
178 | #endif // V8_HOST_ARCH_MIPS |
179 | |
180 | // Extract the information exposed by the kernel via /proc/cpuinfo. |
181 | class CPUInfo final { |
182 | public: |
183 | CPUInfo() : datalen_(0) { |
184 | // Get the size of the cpuinfo file by reading it until the end. This is |
185 | // required because files under /proc do not always return a valid size |
186 | // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed. |
187 | static const char PATHNAME[] = "/proc/cpuinfo" ; |
188 | FILE* fp = fopen(PATHNAME, "r" ); |
189 | if (fp != nullptr) { |
190 | for (;;) { |
191 | char buffer[256]; |
192 | size_t n = fread(buffer, 1, sizeof(buffer), fp); |
193 | if (n == 0) { |
194 | break; |
195 | } |
196 | datalen_ += n; |
197 | } |
198 | fclose(fp); |
199 | } |
200 | |
201 | // Read the contents of the cpuinfo file. |
202 | data_ = new char[datalen_ + 1]; |
203 | fp = fopen(PATHNAME, "r" ); |
204 | if (fp != nullptr) { |
205 | for (size_t offset = 0; offset < datalen_; ) { |
206 | size_t n = fread(data_ + offset, 1, datalen_ - offset, fp); |
207 | if (n == 0) { |
208 | break; |
209 | } |
210 | offset += n; |
211 | } |
212 | fclose(fp); |
213 | } |
214 | |
215 | // Zero-terminate the data. |
216 | data_[datalen_] = '\0'; |
217 | } |
218 | |
219 | ~CPUInfo() { |
220 | delete[] data_; |
221 | } |
222 | |
223 | // Extract the content of a the first occurrence of a given field in |
224 | // the content of the cpuinfo file and return it as a heap-allocated |
225 | // string that must be freed by the caller using delete[]. |
226 | // Return nullptr if not found. |
227 | char* ExtractField(const char* field) const { |
228 | DCHECK_NOT_NULL(field); |
229 | |
230 | // Look for first field occurrence, and ensure it starts the line. |
231 | size_t fieldlen = strlen(field); |
232 | char* p = data_; |
233 | for (;;) { |
234 | p = strstr(p, field); |
235 | if (p == nullptr) { |
236 | return nullptr; |
237 | } |
238 | if (p == data_ || p[-1] == '\n') { |
239 | break; |
240 | } |
241 | p += fieldlen; |
242 | } |
243 | |
244 | // Skip to the first colon followed by a space. |
245 | p = strchr(p + fieldlen, ':'); |
246 | if (p == nullptr || !isspace(p[1])) { |
247 | return nullptr; |
248 | } |
249 | p += 2; |
250 | |
251 | // Find the end of the line. |
252 | char* q = strchr(p, '\n'); |
253 | if (q == nullptr) { |
254 | q = data_ + datalen_; |
255 | } |
256 | |
257 | // Copy the line into a heap-allocated buffer. |
258 | size_t len = q - p; |
259 | char* result = new char[len + 1]; |
260 | if (result != nullptr) { |
261 | memcpy(result, p, len); |
262 | result[len] = '\0'; |
263 | } |
264 | return result; |
265 | } |
266 | |
267 | private: |
268 | char* data_; |
269 | size_t datalen_; |
270 | }; |
271 | |
272 | // Checks that a space-separated list of items contains one given 'item'. |
273 | static bool HasListItem(const char* list, const char* item) { |
274 | ssize_t item_len = strlen(item); |
275 | const char* p = list; |
276 | if (p != nullptr) { |
277 | while (*p != '\0') { |
278 | // Skip whitespace. |
279 | while (isspace(*p)) ++p; |
280 | |
281 | // Find end of current list item. |
282 | const char* q = p; |
283 | while (*q != '\0' && !isspace(*q)) ++q; |
284 | |
285 | if (item_len == q - p && memcmp(p, item, item_len) == 0) { |
286 | return true; |
287 | } |
288 | |
289 | // Skip to next item. |
290 | p = q; |
291 | } |
292 | } |
293 | return false; |
294 | } |
295 | |
296 | #endif // V8_OS_LINUX |
297 | |
298 | #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 |
299 | |
300 | CPU::CPU() |
301 | : stepping_(0), |
302 | model_(0), |
303 | ext_model_(0), |
304 | family_(0), |
305 | ext_family_(0), |
306 | type_(0), |
307 | implementer_(0), |
308 | architecture_(0), |
309 | variant_(-1), |
310 | part_(0), |
311 | icache_line_size_(UNKNOWN_CACHE_LINE_SIZE), |
312 | dcache_line_size_(UNKNOWN_CACHE_LINE_SIZE), |
313 | has_fpu_(false), |
314 | has_cmov_(false), |
315 | has_sahf_(false), |
316 | has_mmx_(false), |
317 | has_sse_(false), |
318 | has_sse2_(false), |
319 | has_sse3_(false), |
320 | has_ssse3_(false), |
321 | has_sse41_(false), |
322 | has_sse42_(false), |
323 | is_atom_(false), |
324 | has_osxsave_(false), |
325 | has_avx_(false), |
326 | has_fma3_(false), |
327 | has_bmi1_(false), |
328 | has_bmi2_(false), |
329 | has_lzcnt_(false), |
330 | has_popcnt_(false), |
331 | has_idiva_(false), |
332 | has_neon_(false), |
333 | has_thumb2_(false), |
334 | has_vfp_(false), |
335 | has_vfp3_(false), |
336 | has_vfp3_d32_(false), |
337 | is_fp64_mode_(false), |
338 | has_non_stop_time_stamp_counter_(false), |
339 | has_msa_(false) { |
340 | memcpy(vendor_, "Unknown" , 8); |
341 | #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 |
342 | int cpu_info[4]; |
343 | |
344 | // __cpuid with an InfoType argument of 0 returns the number of |
345 | // valid Ids in CPUInfo[0] and the CPU identification string in |
346 | // the other three array elements. The CPU identification string is |
347 | // not in linear order. The code below arranges the information |
348 | // in a human readable form. The human readable order is CPUInfo[1] | |
349 | // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped |
350 | // before using memcpy to copy these three array elements to cpu_string. |
351 | __cpuid(cpu_info, 0); |
352 | unsigned num_ids = cpu_info[0]; |
353 | std::swap(cpu_info[2], cpu_info[3]); |
354 | memcpy(vendor_, cpu_info + 1, 12); |
355 | vendor_[12] = '\0'; |
356 | |
357 | // Interpret CPU feature information. |
358 | if (num_ids > 0) { |
359 | __cpuid(cpu_info, 1); |
360 | stepping_ = cpu_info[0] & 0xF; |
361 | model_ = ((cpu_info[0] >> 4) & 0xF) + ((cpu_info[0] >> 12) & 0xF0); |
362 | family_ = (cpu_info[0] >> 8) & 0xF; |
363 | type_ = (cpu_info[0] >> 12) & 0x3; |
364 | ext_model_ = (cpu_info[0] >> 16) & 0xF; |
365 | ext_family_ = (cpu_info[0] >> 20) & 0xFF; |
366 | has_fpu_ = (cpu_info[3] & 0x00000001) != 0; |
367 | has_cmov_ = (cpu_info[3] & 0x00008000) != 0; |
368 | has_mmx_ = (cpu_info[3] & 0x00800000) != 0; |
369 | has_sse_ = (cpu_info[3] & 0x02000000) != 0; |
370 | has_sse2_ = (cpu_info[3] & 0x04000000) != 0; |
371 | has_sse3_ = (cpu_info[2] & 0x00000001) != 0; |
372 | has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; |
373 | has_sse41_ = (cpu_info[2] & 0x00080000) != 0; |
374 | has_sse42_ = (cpu_info[2] & 0x00100000) != 0; |
375 | has_popcnt_ = (cpu_info[2] & 0x00800000) != 0; |
376 | has_osxsave_ = (cpu_info[2] & 0x08000000) != 0; |
377 | has_avx_ = (cpu_info[2] & 0x10000000) != 0; |
378 | has_fma3_ = (cpu_info[2] & 0x00001000) != 0; |
379 | |
380 | if (family_ == 0x6) { |
381 | switch (model_) { |
382 | case 0x1C: // SLT |
383 | case 0x26: |
384 | case 0x36: |
385 | case 0x27: |
386 | case 0x35: |
387 | case 0x37: // SLM |
388 | case 0x4A: |
389 | case 0x4D: |
390 | case 0x4C: // AMT |
391 | case 0x6E: |
392 | is_atom_ = true; |
393 | } |
394 | } |
395 | } |
396 | |
397 | // There are separate feature flags for VEX-encoded GPR instructions. |
398 | if (num_ids >= 7) { |
399 | __cpuid(cpu_info, 7); |
400 | has_bmi1_ = (cpu_info[1] & 0x00000008) != 0; |
401 | has_bmi2_ = (cpu_info[1] & 0x00000100) != 0; |
402 | } |
403 | |
404 | // Query extended IDs. |
405 | __cpuid(cpu_info, 0x80000000); |
406 | unsigned num_ext_ids = cpu_info[0]; |
407 | |
408 | // Interpret extended CPU feature information. |
409 | if (num_ext_ids > 0x80000000) { |
410 | __cpuid(cpu_info, 0x80000001); |
411 | has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0; |
412 | // SAHF must be probed in long mode. |
413 | has_sahf_ = (cpu_info[2] & 0x00000001) != 0; |
414 | } |
415 | |
416 | // Check if CPU has non stoppable time stamp counter. |
417 | const unsigned parameter_containing_non_stop_time_stamp_counter = 0x80000007; |
418 | if (num_ext_ids >= parameter_containing_non_stop_time_stamp_counter) { |
419 | __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); |
420 | has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; |
421 | } |
422 | |
423 | #elif V8_HOST_ARCH_ARM |
424 | |
425 | #if V8_OS_LINUX |
426 | |
427 | CPUInfo cpu_info; |
428 | |
429 | // Extract implementor from the "CPU implementer" field. |
430 | char* implementer = cpu_info.ExtractField("CPU implementer" ); |
431 | if (implementer != nullptr) { |
432 | char* end; |
433 | implementer_ = strtol(implementer, &end, 0); |
434 | if (end == implementer) { |
435 | implementer_ = 0; |
436 | } |
437 | delete[] implementer; |
438 | } |
439 | |
440 | char* variant = cpu_info.ExtractField("CPU variant" ); |
441 | if (variant != nullptr) { |
442 | char* end; |
443 | variant_ = strtol(variant, &end, 0); |
444 | if (end == variant) { |
445 | variant_ = -1; |
446 | } |
447 | delete[] variant; |
448 | } |
449 | |
450 | // Extract part number from the "CPU part" field. |
451 | char* part = cpu_info.ExtractField("CPU part" ); |
452 | if (part != nullptr) { |
453 | char* end; |
454 | part_ = strtol(part, &end, 0); |
455 | if (end == part) { |
456 | part_ = 0; |
457 | } |
458 | delete[] part; |
459 | } |
460 | |
461 | // Extract architecture from the "CPU Architecture" field. |
462 | // The list is well-known, unlike the the output of |
463 | // the 'Processor' field which can vary greatly. |
464 | // See the definition of the 'proc_arch' array in |
465 | // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in |
466 | // same file. |
467 | char* architecture = cpu_info.ExtractField("CPU architecture" ); |
468 | if (architecture != nullptr) { |
469 | char* end; |
470 | architecture_ = strtol(architecture, &end, 10); |
471 | if (end == architecture) { |
472 | // Kernels older than 3.18 report "CPU architecture: AArch64" on ARMv8. |
473 | if (strcmp(architecture, "AArch64" ) == 0) { |
474 | architecture_ = 8; |
475 | } else { |
476 | architecture_ = 0; |
477 | } |
478 | } |
479 | delete[] architecture; |
480 | |
481 | // Unfortunately, it seems that certain ARMv6-based CPUs |
482 | // report an incorrect architecture number of 7! |
483 | // |
484 | // See http://code.google.com/p/android/issues/detail?id=10812 |
485 | // |
486 | // We try to correct this by looking at the 'elf_platform' |
487 | // field reported by the 'Processor' field, which is of the |
488 | // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for |
489 | // an ARMv6-one. For example, the Raspberry Pi is one popular |
490 | // ARMv6 device that reports architecture 7. |
491 | if (architecture_ == 7) { |
492 | char* processor = cpu_info.ExtractField("Processor" ); |
493 | if (HasListItem(processor, "(v6l)" )) { |
494 | architecture_ = 6; |
495 | } |
496 | delete[] processor; |
497 | } |
498 | |
499 | // elf_platform moved to the model name field in Linux v3.8. |
500 | if (architecture_ == 7) { |
501 | char* processor = cpu_info.ExtractField("model name" ); |
502 | if (HasListItem(processor, "(v6l)" )) { |
503 | architecture_ = 6; |
504 | } |
505 | delete[] processor; |
506 | } |
507 | } |
508 | |
509 | // Try to extract the list of CPU features from ELF hwcaps. |
510 | uint32_t hwcaps = ReadELFHWCaps(); |
511 | if (hwcaps != 0) { |
512 | has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0; |
513 | has_neon_ = (hwcaps & HWCAP_NEON) != 0; |
514 | has_vfp_ = (hwcaps & HWCAP_VFP) != 0; |
515 | has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0; |
516 | has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 || |
517 | (hwcaps & HWCAP_VFPD32) != 0)); |
518 | } else { |
519 | // Try to fallback to "Features" CPUInfo field. |
520 | char* features = cpu_info.ExtractField("Features" ); |
521 | has_idiva_ = HasListItem(features, "idiva" ); |
522 | has_neon_ = HasListItem(features, "neon" ); |
523 | has_thumb2_ = HasListItem(features, "thumb2" ); |
524 | has_vfp_ = HasListItem(features, "vfp" ); |
525 | if (HasListItem(features, "vfpv3d16" )) { |
526 | has_vfp3_ = true; |
527 | } else if (HasListItem(features, "vfpv3" )) { |
528 | has_vfp3_ = true; |
529 | has_vfp3_d32_ = true; |
530 | } |
531 | delete[] features; |
532 | } |
533 | |
534 | // Some old kernels will report vfp not vfpv3. Here we make an attempt |
535 | // to detect vfpv3 by checking for vfp *and* neon, since neon is only |
536 | // available on architectures with vfpv3. Checking neon on its own is |
537 | // not enough as it is possible to have neon without vfp. |
538 | if (has_vfp_ && has_neon_) { |
539 | has_vfp3_ = true; |
540 | } |
541 | |
542 | // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6. |
543 | if (architecture_ < 7 && has_vfp3_) { |
544 | architecture_ = 7; |
545 | } |
546 | |
547 | // ARMv7 implies Thumb2. |
548 | if (architecture_ >= 7) { |
549 | has_thumb2_ = true; |
550 | } |
551 | |
552 | // The earliest architecture with Thumb2 is ARMv6T2. |
553 | if (has_thumb2_ && architecture_ < 6) { |
554 | architecture_ = 6; |
555 | } |
556 | |
557 | // We don't support any FPUs other than VFP. |
558 | has_fpu_ = has_vfp_; |
559 | |
560 | #elif V8_OS_QNX |
561 | |
562 | uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags; |
563 | if (cpu_flags & ARM_CPU_FLAG_V7) { |
564 | architecture_ = 7; |
565 | has_thumb2_ = true; |
566 | } else if (cpu_flags & ARM_CPU_FLAG_V6) { |
567 | architecture_ = 6; |
568 | // QNX doesn't say if Thumb2 is available. |
569 | // Assume false for the architectures older than ARMv7. |
570 | } |
571 | DCHECK_GE(architecture_, 6); |
572 | has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0; |
573 | has_vfp_ = has_fpu_; |
574 | if (cpu_flags & ARM_CPU_FLAG_NEON) { |
575 | has_neon_ = true; |
576 | has_vfp3_ = has_vfp_; |
577 | #ifdef ARM_CPU_FLAG_VFP_D32 |
578 | has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0; |
579 | #endif |
580 | } |
581 | has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0; |
582 | |
583 | #endif // V8_OS_LINUX |
584 | |
585 | #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 |
586 | |
587 | // Simple detection of FPU at runtime for Linux. |
588 | // It is based on /proc/cpuinfo, which reveals hardware configuration |
589 | // to user-space applications. According to MIPS (early 2010), no similar |
590 | // facility is universally available on the MIPS architectures, |
591 | // so it's up to individual OSes to provide such. |
592 | CPUInfo cpu_info; |
593 | char* cpu_model = cpu_info.ExtractField("cpu model" ); |
594 | has_fpu_ = HasListItem(cpu_model, "FPU" ); |
595 | char* ASEs = cpu_info.ExtractField("ASEs implemented" ); |
596 | has_msa_ = HasListItem(ASEs, "msa" ); |
597 | delete[] cpu_model; |
598 | delete[] ASEs; |
599 | #ifdef V8_HOST_ARCH_MIPS |
600 | is_fp64_mode_ = __detect_fp64_mode(); |
601 | architecture_ = __detect_mips_arch_revision(); |
602 | #endif |
603 | |
604 | #elif V8_HOST_ARCH_ARM64 |
605 | // Implementer, variant and part are currently unused under ARM64. |
606 | |
607 | #elif V8_HOST_ARCH_PPC |
608 | |
609 | #ifndef USE_SIMULATOR |
610 | #if V8_OS_LINUX |
611 | // Read processor info from /proc/self/auxv. |
612 | char* auxv_cpu_type = nullptr; |
613 | FILE* fp = fopen("/proc/self/auxv" , "r" ); |
614 | if (fp != nullptr) { |
615 | #if V8_TARGET_ARCH_PPC64 |
616 | Elf64_auxv_t entry; |
617 | #else |
618 | Elf32_auxv_t entry; |
619 | #endif |
620 | for (;;) { |
621 | size_t n = fread(&entry, sizeof(entry), 1, fp); |
622 | if (n == 0 || entry.a_type == AT_NULL) { |
623 | break; |
624 | } |
625 | switch (entry.a_type) { |
626 | case AT_PLATFORM: |
627 | auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val); |
628 | break; |
629 | case AT_ICACHEBSIZE: |
630 | icache_line_size_ = entry.a_un.a_val; |
631 | break; |
632 | case AT_DCACHEBSIZE: |
633 | dcache_line_size_ = entry.a_un.a_val; |
634 | break; |
635 | } |
636 | } |
637 | fclose(fp); |
638 | } |
639 | |
640 | part_ = -1; |
641 | if (auxv_cpu_type) { |
642 | if (strcmp(auxv_cpu_type, "power9" ) == 0) { |
643 | part_ = PPC_POWER9; |
644 | } else if (strcmp(auxv_cpu_type, "power8" ) == 0) { |
645 | part_ = PPC_POWER8; |
646 | } else if (strcmp(auxv_cpu_type, "power7" ) == 0) { |
647 | part_ = PPC_POWER7; |
648 | } else if (strcmp(auxv_cpu_type, "power6" ) == 0) { |
649 | part_ = PPC_POWER6; |
650 | } else if (strcmp(auxv_cpu_type, "power5" ) == 0) { |
651 | part_ = PPC_POWER5; |
652 | } else if (strcmp(auxv_cpu_type, "ppc970" ) == 0) { |
653 | part_ = PPC_G5; |
654 | } else if (strcmp(auxv_cpu_type, "ppc7450" ) == 0) { |
655 | part_ = PPC_G4; |
656 | } else if (strcmp(auxv_cpu_type, "pa6t" ) == 0) { |
657 | part_ = PPC_PA6T; |
658 | } |
659 | } |
660 | |
661 | #elif V8_OS_AIX |
662 | switch (_system_configuration.implementation) { |
663 | case POWER_9: |
664 | part_ = PPC_POWER9; |
665 | break; |
666 | case POWER_8: |
667 | part_ = PPC_POWER8; |
668 | break; |
669 | case POWER_7: |
670 | part_ = PPC_POWER7; |
671 | break; |
672 | case POWER_6: |
673 | part_ = PPC_POWER6; |
674 | break; |
675 | case POWER_5: |
676 | part_ = PPC_POWER5; |
677 | break; |
678 | } |
679 | #endif // V8_OS_AIX |
680 | #endif // !USE_SIMULATOR |
681 | #endif // V8_HOST_ARCH_PPC |
682 | } |
683 | |
684 | } // namespace base |
685 | } // namespace v8 |
686 | |