1// Generated by opcode_generator.rb from /home/dima/wk/webkit/Source/JavaScriptCore/b3/air/AirOpcode.opcodes -- do not edit!
2#ifndef AirOpcodeUtils_h
3#define AirOpcodeUtils_h
4#include "AirCustom.h"
5#include "AirInst.h"
6#include "AirFormTable.h"
7namespace JSC { namespace B3 { namespace Air {
8inline bool opgenHiddenTruth() { return true; }
9template<typename T>
10inline T* opgenHiddenPtrIdentity(T* pointer) { return pointer; }
11#define OPGEN_RETURN(value) do {\
12 if (opgenHiddenTruth())\
13 return value;\
14} while (false)
15template<typename Functor>
16ALWAYS_INLINE void Inst::forEachArg(const Functor& functor)
17{
18switch (kind.opcode) {
19case Opcode::EntrySwitch:
20case Opcode::Shuffle:
21case Opcode::Patch:
22case Opcode::CCall:
23case Opcode::ColdCCall:
24case Opcode::WasmBoundsCheck:
25forEachArgCustom(scopedLambdaRef<EachArgCallback>(functor));
26return;
27default:
28forEachArgSimple(functor);
29return;
30}
31}
32template<typename Func>
33ALWAYS_INLINE void Inst::forEachArgSimple(const Func& func)
34{
35 size_t numOperands = args.size();
36 size_t formOffset = (numOperands - 1) * numOperands / 2;
37 const uint8_t* formBase = g_formTable + kind.opcode * 21 + formOffset;
38 for (size_t i = 0; i < numOperands; ++i) {
39 uint8_t form = formBase[i];
40 ASSERT(!(form & (1 << formInvalidShift)));
41 func(args[i], decodeFormRole(form), decodeFormBank(form), decodeFormWidth(form));
42 }
43}
44template<typename... Arguments>
45ALWAYS_INLINE bool isValidForm(Opcode opcode, Arguments... arguments)
46{
47Arg::Kind kinds[sizeof...(Arguments)] = { arguments... };
48switch (opcode) {
49case Opcode::Nop:
50switch (sizeof...(Arguments)) {
51case 0:
52OPGEN_RETURN(true);
53break;
54break;
55default:
56break;
57}
58break;
59case Opcode::Add32:
60switch (sizeof...(Arguments)) {
61case 3:
62switch (opgenHiddenPtrIdentity(kinds)[0]) {
63case Arg::Imm:
64switch (opgenHiddenPtrIdentity(kinds)[1]) {
65case Arg::Tmp:
66switch (opgenHiddenPtrIdentity(kinds)[2]) {
67case Arg::Tmp:
68OPGEN_RETURN(true);
69break;
70break;
71default:
72break;
73}
74break;
75default:
76break;
77}
78break;
79case Arg::Tmp:
80switch (opgenHiddenPtrIdentity(kinds)[1]) {
81case Arg::Tmp:
82switch (opgenHiddenPtrIdentity(kinds)[2]) {
83case Arg::Tmp:
84OPGEN_RETURN(true);
85break;
86break;
87default:
88break;
89}
90break;
91default:
92break;
93}
94break;
95default:
96break;
97}
98break;
99case 2:
100switch (opgenHiddenPtrIdentity(kinds)[0]) {
101case Arg::Tmp:
102switch (opgenHiddenPtrIdentity(kinds)[1]) {
103case Arg::Tmp:
104OPGEN_RETURN(true);
105break;
106break;
107case Arg::Addr:
108case Arg::Stack:
109case Arg::CallArg:
110#if CPU(X86) || CPU(X86_64)
111OPGEN_RETURN(true);
112#endif
113break;
114break;
115case Arg::Index:
116#if CPU(X86) || CPU(X86_64)
117OPGEN_RETURN(true);
118#endif
119break;
120break;
121default:
122break;
123}
124break;
125case Arg::Imm:
126switch (opgenHiddenPtrIdentity(kinds)[1]) {
127case Arg::Addr:
128case Arg::Stack:
129case Arg::CallArg:
130#if CPU(X86) || CPU(X86_64)
131OPGEN_RETURN(true);
132#endif
133break;
134break;
135case Arg::Index:
136#if CPU(X86) || CPU(X86_64)
137OPGEN_RETURN(true);
138#endif
139break;
140break;
141case Arg::Tmp:
142OPGEN_RETURN(true);
143break;
144break;
145default:
146break;
147}
148break;
149case Arg::Addr:
150case Arg::Stack:
151case Arg::CallArg:
152switch (opgenHiddenPtrIdentity(kinds)[1]) {
153case Arg::Tmp:
154#if CPU(X86) || CPU(X86_64)
155OPGEN_RETURN(true);
156#endif
157break;
158break;
159default:
160break;
161}
162break;
163case Arg::Index:
164switch (opgenHiddenPtrIdentity(kinds)[1]) {
165case Arg::Tmp:
166#if CPU(X86) || CPU(X86_64)
167OPGEN_RETURN(true);
168#endif
169break;
170break;
171default:
172break;
173}
174break;
175default:
176break;
177}
178break;
179default:
180break;
181}
182break;
183case Opcode::Add8:
184switch (sizeof...(Arguments)) {
185case 2:
186switch (opgenHiddenPtrIdentity(kinds)[0]) {
187case Arg::Imm:
188switch (opgenHiddenPtrIdentity(kinds)[1]) {
189case Arg::Addr:
190case Arg::Stack:
191case Arg::CallArg:
192#if CPU(X86) || CPU(X86_64)
193OPGEN_RETURN(true);
194#endif
195break;
196break;
197case Arg::Index:
198#if CPU(X86) || CPU(X86_64)
199OPGEN_RETURN(true);
200#endif
201break;
202break;
203default:
204break;
205}
206break;
207case Arg::Tmp:
208switch (opgenHiddenPtrIdentity(kinds)[1]) {
209case Arg::Addr:
210case Arg::Stack:
211case Arg::CallArg:
212#if CPU(X86) || CPU(X86_64)
213OPGEN_RETURN(true);
214#endif
215break;
216break;
217case Arg::Index:
218#if CPU(X86) || CPU(X86_64)
219OPGEN_RETURN(true);
220#endif
221break;
222break;
223default:
224break;
225}
226break;
227default:
228break;
229}
230break;
231default:
232break;
233}
234break;
235case Opcode::Add16:
236switch (sizeof...(Arguments)) {
237case 2:
238switch (opgenHiddenPtrIdentity(kinds)[0]) {
239case Arg::Imm:
240switch (opgenHiddenPtrIdentity(kinds)[1]) {
241case Arg::Addr:
242case Arg::Stack:
243case Arg::CallArg:
244#if CPU(X86) || CPU(X86_64)
245OPGEN_RETURN(true);
246#endif
247break;
248break;
249case Arg::Index:
250#if CPU(X86) || CPU(X86_64)
251OPGEN_RETURN(true);
252#endif
253break;
254break;
255default:
256break;
257}
258break;
259case Arg::Tmp:
260switch (opgenHiddenPtrIdentity(kinds)[1]) {
261case Arg::Addr:
262case Arg::Stack:
263case Arg::CallArg:
264#if CPU(X86) || CPU(X86_64)
265OPGEN_RETURN(true);
266#endif
267break;
268break;
269case Arg::Index:
270#if CPU(X86) || CPU(X86_64)
271OPGEN_RETURN(true);
272#endif
273break;
274break;
275default:
276break;
277}
278break;
279default:
280break;
281}
282break;
283default:
284break;
285}
286break;
287case Opcode::Add64:
288switch (sizeof...(Arguments)) {
289case 2:
290switch (opgenHiddenPtrIdentity(kinds)[0]) {
291case Arg::Tmp:
292switch (opgenHiddenPtrIdentity(kinds)[1]) {
293case Arg::Tmp:
294#if CPU(X86_64) || CPU(ARM64)
295OPGEN_RETURN(true);
296#endif
297break;
298break;
299case Arg::Addr:
300case Arg::Stack:
301case Arg::CallArg:
302#if CPU(X86_64)
303OPGEN_RETURN(true);
304#endif
305break;
306break;
307case Arg::Index:
308#if CPU(X86_64)
309OPGEN_RETURN(true);
310#endif
311break;
312break;
313default:
314break;
315}
316break;
317case Arg::Imm:
318switch (opgenHiddenPtrIdentity(kinds)[1]) {
319case Arg::Addr:
320case Arg::Stack:
321case Arg::CallArg:
322#if CPU(X86_64)
323OPGEN_RETURN(true);
324#endif
325break;
326break;
327case Arg::Index:
328#if CPU(X86_64)
329OPGEN_RETURN(true);
330#endif
331break;
332break;
333case Arg::Tmp:
334#if CPU(X86_64) || CPU(ARM64)
335OPGEN_RETURN(true);
336#endif
337break;
338break;
339default:
340break;
341}
342break;
343case Arg::Addr:
344case Arg::Stack:
345case Arg::CallArg:
346switch (opgenHiddenPtrIdentity(kinds)[1]) {
347case Arg::Tmp:
348#if CPU(X86_64)
349OPGEN_RETURN(true);
350#endif
351break;
352break;
353default:
354break;
355}
356break;
357case Arg::Index:
358switch (opgenHiddenPtrIdentity(kinds)[1]) {
359case Arg::Tmp:
360#if CPU(X86_64)
361OPGEN_RETURN(true);
362#endif
363break;
364break;
365default:
366break;
367}
368break;
369default:
370break;
371}
372break;
373case 3:
374switch (opgenHiddenPtrIdentity(kinds)[0]) {
375case Arg::Imm:
376switch (opgenHiddenPtrIdentity(kinds)[1]) {
377case Arg::Tmp:
378switch (opgenHiddenPtrIdentity(kinds)[2]) {
379case Arg::Tmp:
380#if CPU(X86_64) || CPU(ARM64)
381OPGEN_RETURN(true);
382#endif
383break;
384break;
385default:
386break;
387}
388break;
389default:
390break;
391}
392break;
393case Arg::Tmp:
394switch (opgenHiddenPtrIdentity(kinds)[1]) {
395case Arg::Tmp:
396switch (opgenHiddenPtrIdentity(kinds)[2]) {
397case Arg::Tmp:
398#if CPU(X86_64) || CPU(ARM64)
399OPGEN_RETURN(true);
400#endif
401break;
402break;
403default:
404break;
405}
406break;
407default:
408break;
409}
410break;
411default:
412break;
413}
414break;
415default:
416break;
417}
418break;
419case Opcode::AddDouble:
420switch (sizeof...(Arguments)) {
421case 3:
422switch (opgenHiddenPtrIdentity(kinds)[0]) {
423case Arg::Tmp:
424switch (opgenHiddenPtrIdentity(kinds)[1]) {
425case Arg::Tmp:
426switch (opgenHiddenPtrIdentity(kinds)[2]) {
427case Arg::Tmp:
428OPGEN_RETURN(true);
429break;
430break;
431default:
432break;
433}
434break;
435case Arg::Addr:
436case Arg::Stack:
437case Arg::CallArg:
438switch (opgenHiddenPtrIdentity(kinds)[2]) {
439case Arg::Tmp:
440#if CPU(X86) || CPU(X86_64)
441OPGEN_RETURN(true);
442#endif
443break;
444break;
445default:
446break;
447}
448break;
449default:
450break;
451}
452break;
453case Arg::Addr:
454case Arg::Stack:
455case Arg::CallArg:
456switch (opgenHiddenPtrIdentity(kinds)[1]) {
457case Arg::Tmp:
458switch (opgenHiddenPtrIdentity(kinds)[2]) {
459case Arg::Tmp:
460#if CPU(X86) || CPU(X86_64)
461OPGEN_RETURN(true);
462#endif
463break;
464break;
465default:
466break;
467}
468break;
469default:
470break;
471}
472break;
473case Arg::Index:
474switch (opgenHiddenPtrIdentity(kinds)[1]) {
475case Arg::Tmp:
476switch (opgenHiddenPtrIdentity(kinds)[2]) {
477case Arg::Tmp:
478#if CPU(X86) || CPU(X86_64)
479OPGEN_RETURN(true);
480#endif
481break;
482break;
483default:
484break;
485}
486break;
487default:
488break;
489}
490break;
491default:
492break;
493}
494break;
495case 2:
496switch (opgenHiddenPtrIdentity(kinds)[0]) {
497case Arg::Tmp:
498switch (opgenHiddenPtrIdentity(kinds)[1]) {
499case Arg::Tmp:
500#if CPU(X86) || CPU(X86_64)
501OPGEN_RETURN(true);
502#endif
503break;
504break;
505default:
506break;
507}
508break;
509case Arg::Addr:
510case Arg::Stack:
511case Arg::CallArg:
512switch (opgenHiddenPtrIdentity(kinds)[1]) {
513case Arg::Tmp:
514#if CPU(X86) || CPU(X86_64)
515OPGEN_RETURN(true);
516#endif
517break;
518break;
519default:
520break;
521}
522break;
523default:
524break;
525}
526break;
527default:
528break;
529}
530break;
531case Opcode::AddFloat:
532switch (sizeof...(Arguments)) {
533case 3:
534switch (opgenHiddenPtrIdentity(kinds)[0]) {
535case Arg::Tmp:
536switch (opgenHiddenPtrIdentity(kinds)[1]) {
537case Arg::Tmp:
538switch (opgenHiddenPtrIdentity(kinds)[2]) {
539case Arg::Tmp:
540OPGEN_RETURN(true);
541break;
542break;
543default:
544break;
545}
546break;
547case Arg::Addr:
548case Arg::Stack:
549case Arg::CallArg:
550switch (opgenHiddenPtrIdentity(kinds)[2]) {
551case Arg::Tmp:
552#if CPU(X86) || CPU(X86_64)
553OPGEN_RETURN(true);
554#endif
555break;
556break;
557default:
558break;
559}
560break;
561default:
562break;
563}
564break;
565case Arg::Addr:
566case Arg::Stack:
567case Arg::CallArg:
568switch (opgenHiddenPtrIdentity(kinds)[1]) {
569case Arg::Tmp:
570switch (opgenHiddenPtrIdentity(kinds)[2]) {
571case Arg::Tmp:
572#if CPU(X86) || CPU(X86_64)
573OPGEN_RETURN(true);
574#endif
575break;
576break;
577default:
578break;
579}
580break;
581default:
582break;
583}
584break;
585case Arg::Index:
586switch (opgenHiddenPtrIdentity(kinds)[1]) {
587case Arg::Tmp:
588switch (opgenHiddenPtrIdentity(kinds)[2]) {
589case Arg::Tmp:
590#if CPU(X86) || CPU(X86_64)
591OPGEN_RETURN(true);
592#endif
593break;
594break;
595default:
596break;
597}
598break;
599default:
600break;
601}
602break;
603default:
604break;
605}
606break;
607case 2:
608switch (opgenHiddenPtrIdentity(kinds)[0]) {
609case Arg::Tmp:
610switch (opgenHiddenPtrIdentity(kinds)[1]) {
611case Arg::Tmp:
612#if CPU(X86) || CPU(X86_64)
613OPGEN_RETURN(true);
614#endif
615break;
616break;
617default:
618break;
619}
620break;
621case Arg::Addr:
622case Arg::Stack:
623case Arg::CallArg:
624switch (opgenHiddenPtrIdentity(kinds)[1]) {
625case Arg::Tmp:
626#if CPU(X86) || CPU(X86_64)
627OPGEN_RETURN(true);
628#endif
629break;
630break;
631default:
632break;
633}
634break;
635default:
636break;
637}
638break;
639default:
640break;
641}
642break;
643case Opcode::Sub32:
644switch (sizeof...(Arguments)) {
645case 2:
646switch (opgenHiddenPtrIdentity(kinds)[0]) {
647case Arg::Tmp:
648switch (opgenHiddenPtrIdentity(kinds)[1]) {
649case Arg::Tmp:
650OPGEN_RETURN(true);
651break;
652break;
653case Arg::Addr:
654case Arg::Stack:
655case Arg::CallArg:
656#if CPU(X86) || CPU(X86_64)
657OPGEN_RETURN(true);
658#endif
659break;
660break;
661case Arg::Index:
662#if CPU(X86) || CPU(X86_64)
663OPGEN_RETURN(true);
664#endif
665break;
666break;
667default:
668break;
669}
670break;
671case Arg::Imm:
672switch (opgenHiddenPtrIdentity(kinds)[1]) {
673case Arg::Addr:
674case Arg::Stack:
675case Arg::CallArg:
676#if CPU(X86) || CPU(X86_64)
677OPGEN_RETURN(true);
678#endif
679break;
680break;
681case Arg::Index:
682#if CPU(X86) || CPU(X86_64)
683OPGEN_RETURN(true);
684#endif
685break;
686break;
687case Arg::Tmp:
688OPGEN_RETURN(true);
689break;
690break;
691default:
692break;
693}
694break;
695case Arg::Addr:
696case Arg::Stack:
697case Arg::CallArg:
698switch (opgenHiddenPtrIdentity(kinds)[1]) {
699case Arg::Tmp:
700#if CPU(X86) || CPU(X86_64)
701OPGEN_RETURN(true);
702#endif
703break;
704break;
705default:
706break;
707}
708break;
709case Arg::Index:
710switch (opgenHiddenPtrIdentity(kinds)[1]) {
711case Arg::Tmp:
712#if CPU(X86) || CPU(X86_64)
713OPGEN_RETURN(true);
714#endif
715break;
716break;
717default:
718break;
719}
720break;
721default:
722break;
723}
724break;
725case 3:
726switch (opgenHiddenPtrIdentity(kinds)[0]) {
727case Arg::Tmp:
728switch (opgenHiddenPtrIdentity(kinds)[1]) {
729case Arg::Tmp:
730switch (opgenHiddenPtrIdentity(kinds)[2]) {
731case Arg::Tmp:
732#if CPU(ARM64)
733OPGEN_RETURN(true);
734#endif
735break;
736break;
737default:
738break;
739}
740break;
741default:
742break;
743}
744break;
745default:
746break;
747}
748break;
749default:
750break;
751}
752break;
753case Opcode::Sub64:
754switch (sizeof...(Arguments)) {
755case 2:
756switch (opgenHiddenPtrIdentity(kinds)[0]) {
757case Arg::Tmp:
758switch (opgenHiddenPtrIdentity(kinds)[1]) {
759case Arg::Tmp:
760#if CPU(X86_64) || CPU(ARM64)
761OPGEN_RETURN(true);
762#endif
763break;
764break;
765case Arg::Addr:
766case Arg::Stack:
767case Arg::CallArg:
768#if CPU(X86_64)
769OPGEN_RETURN(true);
770#endif
771break;
772break;
773case Arg::Index:
774#if CPU(X86_64)
775OPGEN_RETURN(true);
776#endif
777break;
778break;
779default:
780break;
781}
782break;
783case Arg::Imm:
784switch (opgenHiddenPtrIdentity(kinds)[1]) {
785case Arg::Addr:
786case Arg::Stack:
787case Arg::CallArg:
788#if CPU(X86_64)
789OPGEN_RETURN(true);
790#endif
791break;
792break;
793case Arg::Index:
794#if CPU(X86_64)
795OPGEN_RETURN(true);
796#endif
797break;
798break;
799case Arg::Tmp:
800#if CPU(X86_64) || CPU(ARM64)
801OPGEN_RETURN(true);
802#endif
803break;
804break;
805default:
806break;
807}
808break;
809case Arg::Addr:
810case Arg::Stack:
811case Arg::CallArg:
812switch (opgenHiddenPtrIdentity(kinds)[1]) {
813case Arg::Tmp:
814#if CPU(X86_64)
815OPGEN_RETURN(true);
816#endif
817break;
818break;
819default:
820break;
821}
822break;
823case Arg::Index:
824switch (opgenHiddenPtrIdentity(kinds)[1]) {
825case Arg::Tmp:
826#if CPU(X86_64)
827OPGEN_RETURN(true);
828#endif
829break;
830break;
831default:
832break;
833}
834break;
835default:
836break;
837}
838break;
839case 3:
840switch (opgenHiddenPtrIdentity(kinds)[0]) {
841case Arg::Tmp:
842switch (opgenHiddenPtrIdentity(kinds)[1]) {
843case Arg::Tmp:
844switch (opgenHiddenPtrIdentity(kinds)[2]) {
845case Arg::Tmp:
846#if CPU(ARM64)
847OPGEN_RETURN(true);
848#endif
849break;
850break;
851default:
852break;
853}
854break;
855default:
856break;
857}
858break;
859default:
860break;
861}
862break;
863default:
864break;
865}
866break;
867case Opcode::SubDouble:
868switch (sizeof...(Arguments)) {
869case 3:
870switch (opgenHiddenPtrIdentity(kinds)[0]) {
871case Arg::Tmp:
872switch (opgenHiddenPtrIdentity(kinds)[1]) {
873case Arg::Tmp:
874switch (opgenHiddenPtrIdentity(kinds)[2]) {
875case Arg::Tmp:
876#if CPU(ARM64)
877OPGEN_RETURN(true);
878#endif
879break;
880break;
881default:
882break;
883}
884break;
885case Arg::Addr:
886case Arg::Stack:
887case Arg::CallArg:
888switch (opgenHiddenPtrIdentity(kinds)[2]) {
889case Arg::Tmp:
890#if CPU(X86) || CPU(X86_64)
891OPGEN_RETURN(true);
892#endif
893break;
894break;
895default:
896break;
897}
898break;
899case Arg::Index:
900switch (opgenHiddenPtrIdentity(kinds)[2]) {
901case Arg::Tmp:
902#if CPU(X86) || CPU(X86_64)
903OPGEN_RETURN(true);
904#endif
905break;
906break;
907default:
908break;
909}
910break;
911default:
912break;
913}
914break;
915default:
916break;
917}
918break;
919case 2:
920switch (opgenHiddenPtrIdentity(kinds)[0]) {
921case Arg::Tmp:
922switch (opgenHiddenPtrIdentity(kinds)[1]) {
923case Arg::Tmp:
924#if CPU(X86) || CPU(X86_64)
925OPGEN_RETURN(true);
926#endif
927break;
928break;
929default:
930break;
931}
932break;
933case Arg::Addr:
934case Arg::Stack:
935case Arg::CallArg:
936switch (opgenHiddenPtrIdentity(kinds)[1]) {
937case Arg::Tmp:
938#if CPU(X86) || CPU(X86_64)
939OPGEN_RETURN(true);
940#endif
941break;
942break;
943default:
944break;
945}
946break;
947default:
948break;
949}
950break;
951default:
952break;
953}
954break;
955case Opcode::SubFloat:
956switch (sizeof...(Arguments)) {
957case 3:
958switch (opgenHiddenPtrIdentity(kinds)[0]) {
959case Arg::Tmp:
960switch (opgenHiddenPtrIdentity(kinds)[1]) {
961case Arg::Tmp:
962switch (opgenHiddenPtrIdentity(kinds)[2]) {
963case Arg::Tmp:
964#if CPU(ARM64)
965OPGEN_RETURN(true);
966#endif
967break;
968break;
969default:
970break;
971}
972break;
973case Arg::Addr:
974case Arg::Stack:
975case Arg::CallArg:
976switch (opgenHiddenPtrIdentity(kinds)[2]) {
977case Arg::Tmp:
978#if CPU(X86) || CPU(X86_64)
979OPGEN_RETURN(true);
980#endif
981break;
982break;
983default:
984break;
985}
986break;
987case Arg::Index:
988switch (opgenHiddenPtrIdentity(kinds)[2]) {
989case Arg::Tmp:
990#if CPU(X86) || CPU(X86_64)
991OPGEN_RETURN(true);
992#endif
993break;
994break;
995default:
996break;
997}
998break;
999default:
1000break;
1001}
1002break;
1003default:
1004break;
1005}
1006break;
1007case 2:
1008switch (opgenHiddenPtrIdentity(kinds)[0]) {
1009case Arg::Tmp:
1010switch (opgenHiddenPtrIdentity(kinds)[1]) {
1011case Arg::Tmp:
1012#if CPU(X86) || CPU(X86_64)
1013OPGEN_RETURN(true);
1014#endif
1015break;
1016break;
1017default:
1018break;
1019}
1020break;
1021case Arg::Addr:
1022case Arg::Stack:
1023case Arg::CallArg:
1024switch (opgenHiddenPtrIdentity(kinds)[1]) {
1025case Arg::Tmp:
1026#if CPU(X86) || CPU(X86_64)
1027OPGEN_RETURN(true);
1028#endif
1029break;
1030break;
1031default:
1032break;
1033}
1034break;
1035default:
1036break;
1037}
1038break;
1039default:
1040break;
1041}
1042break;
1043case Opcode::Neg32:
1044switch (sizeof...(Arguments)) {
1045case 1:
1046switch (opgenHiddenPtrIdentity(kinds)[0]) {
1047case Arg::Tmp:
1048OPGEN_RETURN(true);
1049break;
1050break;
1051case Arg::Addr:
1052case Arg::Stack:
1053case Arg::CallArg:
1054#if CPU(X86) || CPU(X86_64)
1055OPGEN_RETURN(true);
1056#endif
1057break;
1058break;
1059case Arg::Index:
1060#if CPU(X86) || CPU(X86_64)
1061OPGEN_RETURN(true);
1062#endif
1063break;
1064break;
1065default:
1066break;
1067}
1068break;
1069default:
1070break;
1071}
1072break;
1073case Opcode::Neg64:
1074switch (sizeof...(Arguments)) {
1075case 1:
1076switch (opgenHiddenPtrIdentity(kinds)[0]) {
1077case Arg::Tmp:
1078#if CPU(X86_64) || CPU(ARM64)
1079OPGEN_RETURN(true);
1080#endif
1081break;
1082break;
1083case Arg::Addr:
1084case Arg::Stack:
1085case Arg::CallArg:
1086#if CPU(X86_64)
1087OPGEN_RETURN(true);
1088#endif
1089break;
1090break;
1091case Arg::Index:
1092#if CPU(X86_64)
1093OPGEN_RETURN(true);
1094#endif
1095break;
1096break;
1097default:
1098break;
1099}
1100break;
1101default:
1102break;
1103}
1104break;
1105case Opcode::NegateDouble:
1106switch (sizeof...(Arguments)) {
1107case 2:
1108switch (opgenHiddenPtrIdentity(kinds)[0]) {
1109case Arg::Tmp:
1110switch (opgenHiddenPtrIdentity(kinds)[1]) {
1111case Arg::Tmp:
1112#if CPU(ARM64)
1113OPGEN_RETURN(true);
1114#endif
1115break;
1116break;
1117default:
1118break;
1119}
1120break;
1121default:
1122break;
1123}
1124break;
1125default:
1126break;
1127}
1128break;
1129case Opcode::NegateFloat:
1130switch (sizeof...(Arguments)) {
1131case 2:
1132switch (opgenHiddenPtrIdentity(kinds)[0]) {
1133case Arg::Tmp:
1134switch (opgenHiddenPtrIdentity(kinds)[1]) {
1135case Arg::Tmp:
1136#if CPU(ARM64)
1137OPGEN_RETURN(true);
1138#endif
1139break;
1140break;
1141default:
1142break;
1143}
1144break;
1145default:
1146break;
1147}
1148break;
1149default:
1150break;
1151}
1152break;
1153case Opcode::Mul32:
1154switch (sizeof...(Arguments)) {
1155case 2:
1156switch (opgenHiddenPtrIdentity(kinds)[0]) {
1157case Arg::Tmp:
1158switch (opgenHiddenPtrIdentity(kinds)[1]) {
1159case Arg::Tmp:
1160OPGEN_RETURN(true);
1161break;
1162break;
1163default:
1164break;
1165}
1166break;
1167case Arg::Addr:
1168case Arg::Stack:
1169case Arg::CallArg:
1170switch (opgenHiddenPtrIdentity(kinds)[1]) {
1171case Arg::Tmp:
1172#if CPU(X86) || CPU(X86_64)
1173OPGEN_RETURN(true);
1174#endif
1175break;
1176break;
1177default:
1178break;
1179}
1180break;
1181default:
1182break;
1183}
1184break;
1185case 3:
1186switch (opgenHiddenPtrIdentity(kinds)[0]) {
1187case Arg::Tmp:
1188switch (opgenHiddenPtrIdentity(kinds)[1]) {
1189case Arg::Tmp:
1190switch (opgenHiddenPtrIdentity(kinds)[2]) {
1191case Arg::Tmp:
1192OPGEN_RETURN(true);
1193break;
1194break;
1195default:
1196break;
1197}
1198break;
1199case Arg::Addr:
1200case Arg::Stack:
1201case Arg::CallArg:
1202switch (opgenHiddenPtrIdentity(kinds)[2]) {
1203case Arg::Tmp:
1204#if CPU(X86) || CPU(X86_64)
1205OPGEN_RETURN(true);
1206#endif
1207break;
1208break;
1209default:
1210break;
1211}
1212break;
1213default:
1214break;
1215}
1216break;
1217case Arg::Addr:
1218case Arg::Stack:
1219case Arg::CallArg:
1220switch (opgenHiddenPtrIdentity(kinds)[1]) {
1221case Arg::Tmp:
1222switch (opgenHiddenPtrIdentity(kinds)[2]) {
1223case Arg::Tmp:
1224#if CPU(X86) || CPU(X86_64)
1225OPGEN_RETURN(true);
1226#endif
1227break;
1228break;
1229default:
1230break;
1231}
1232break;
1233default:
1234break;
1235}
1236break;
1237case Arg::Imm:
1238switch (opgenHiddenPtrIdentity(kinds)[1]) {
1239case Arg::Tmp:
1240switch (opgenHiddenPtrIdentity(kinds)[2]) {
1241case Arg::Tmp:
1242#if CPU(X86) || CPU(X86_64)
1243OPGEN_RETURN(true);
1244#endif
1245break;
1246break;
1247default:
1248break;
1249}
1250break;
1251default:
1252break;
1253}
1254break;
1255default:
1256break;
1257}
1258break;
1259default:
1260break;
1261}
1262break;
1263case Opcode::Mul64:
1264switch (sizeof...(Arguments)) {
1265case 2:
1266switch (opgenHiddenPtrIdentity(kinds)[0]) {
1267case Arg::Tmp:
1268switch (opgenHiddenPtrIdentity(kinds)[1]) {
1269case Arg::Tmp:
1270#if CPU(X86_64) || CPU(ARM64)
1271OPGEN_RETURN(true);
1272#endif
1273break;
1274break;
1275default:
1276break;
1277}
1278break;
1279default:
1280break;
1281}
1282break;
1283case 3:
1284switch (opgenHiddenPtrIdentity(kinds)[0]) {
1285case Arg::Tmp:
1286switch (opgenHiddenPtrIdentity(kinds)[1]) {
1287case Arg::Tmp:
1288switch (opgenHiddenPtrIdentity(kinds)[2]) {
1289case Arg::Tmp:
1290OPGEN_RETURN(true);
1291break;
1292break;
1293default:
1294break;
1295}
1296break;
1297default:
1298break;
1299}
1300break;
1301default:
1302break;
1303}
1304break;
1305default:
1306break;
1307}
1308break;
1309case Opcode::MultiplyAdd32:
1310switch (sizeof...(Arguments)) {
1311case 4:
1312switch (opgenHiddenPtrIdentity(kinds)[0]) {
1313case Arg::Tmp:
1314switch (opgenHiddenPtrIdentity(kinds)[1]) {
1315case Arg::Tmp:
1316switch (opgenHiddenPtrIdentity(kinds)[2]) {
1317case Arg::Tmp:
1318switch (opgenHiddenPtrIdentity(kinds)[3]) {
1319case Arg::Tmp:
1320#if CPU(ARM64)
1321OPGEN_RETURN(true);
1322#endif
1323break;
1324break;
1325default:
1326break;
1327}
1328break;
1329default:
1330break;
1331}
1332break;
1333default:
1334break;
1335}
1336break;
1337default:
1338break;
1339}
1340break;
1341default:
1342break;
1343}
1344break;
1345case Opcode::MultiplyAdd64:
1346switch (sizeof...(Arguments)) {
1347case 4:
1348switch (opgenHiddenPtrIdentity(kinds)[0]) {
1349case Arg::Tmp:
1350switch (opgenHiddenPtrIdentity(kinds)[1]) {
1351case Arg::Tmp:
1352switch (opgenHiddenPtrIdentity(kinds)[2]) {
1353case Arg::Tmp:
1354switch (opgenHiddenPtrIdentity(kinds)[3]) {
1355case Arg::Tmp:
1356#if CPU(ARM64)
1357OPGEN_RETURN(true);
1358#endif
1359break;
1360break;
1361default:
1362break;
1363}
1364break;
1365default:
1366break;
1367}
1368break;
1369default:
1370break;
1371}
1372break;
1373default:
1374break;
1375}
1376break;
1377default:
1378break;
1379}
1380break;
1381case Opcode::MultiplySub32:
1382switch (sizeof...(Arguments)) {
1383case 4:
1384switch (opgenHiddenPtrIdentity(kinds)[0]) {
1385case Arg::Tmp:
1386switch (opgenHiddenPtrIdentity(kinds)[1]) {
1387case Arg::Tmp:
1388switch (opgenHiddenPtrIdentity(kinds)[2]) {
1389case Arg::Tmp:
1390switch (opgenHiddenPtrIdentity(kinds)[3]) {
1391case Arg::Tmp:
1392#if CPU(ARM64)
1393OPGEN_RETURN(true);
1394#endif
1395break;
1396break;
1397default:
1398break;
1399}
1400break;
1401default:
1402break;
1403}
1404break;
1405default:
1406break;
1407}
1408break;
1409default:
1410break;
1411}
1412break;
1413default:
1414break;
1415}
1416break;
1417case Opcode::MultiplySub64:
1418switch (sizeof...(Arguments)) {
1419case 4:
1420switch (opgenHiddenPtrIdentity(kinds)[0]) {
1421case Arg::Tmp:
1422switch (opgenHiddenPtrIdentity(kinds)[1]) {
1423case Arg::Tmp:
1424switch (opgenHiddenPtrIdentity(kinds)[2]) {
1425case Arg::Tmp:
1426switch (opgenHiddenPtrIdentity(kinds)[3]) {
1427case Arg::Tmp:
1428#if CPU(ARM64)
1429OPGEN_RETURN(true);
1430#endif
1431break;
1432break;
1433default:
1434break;
1435}
1436break;
1437default:
1438break;
1439}
1440break;
1441default:
1442break;
1443}
1444break;
1445default:
1446break;
1447}
1448break;
1449default:
1450break;
1451}
1452break;
1453case Opcode::MultiplyNeg32:
1454switch (sizeof...(Arguments)) {
1455case 3:
1456switch (opgenHiddenPtrIdentity(kinds)[0]) {
1457case Arg::Tmp:
1458switch (opgenHiddenPtrIdentity(kinds)[1]) {
1459case Arg::Tmp:
1460switch (opgenHiddenPtrIdentity(kinds)[2]) {
1461case Arg::Tmp:
1462#if CPU(ARM64)
1463OPGEN_RETURN(true);
1464#endif
1465break;
1466break;
1467default:
1468break;
1469}
1470break;
1471default:
1472break;
1473}
1474break;
1475default:
1476break;
1477}
1478break;
1479default:
1480break;
1481}
1482break;
1483case Opcode::MultiplyNeg64:
1484switch (sizeof...(Arguments)) {
1485case 3:
1486switch (opgenHiddenPtrIdentity(kinds)[0]) {
1487case Arg::Tmp:
1488switch (opgenHiddenPtrIdentity(kinds)[1]) {
1489case Arg::Tmp:
1490switch (opgenHiddenPtrIdentity(kinds)[2]) {
1491case Arg::Tmp:
1492#if CPU(ARM64)
1493OPGEN_RETURN(true);
1494#endif
1495break;
1496break;
1497default:
1498break;
1499}
1500break;
1501default:
1502break;
1503}
1504break;
1505default:
1506break;
1507}
1508break;
1509default:
1510break;
1511}
1512break;
1513case Opcode::MultiplySignExtend32:
1514switch (sizeof...(Arguments)) {
1515case 3:
1516switch (opgenHiddenPtrIdentity(kinds)[0]) {
1517case Arg::Tmp:
1518switch (opgenHiddenPtrIdentity(kinds)[1]) {
1519case Arg::Tmp:
1520switch (opgenHiddenPtrIdentity(kinds)[2]) {
1521case Arg::Tmp:
1522#if CPU(ARM64)
1523OPGEN_RETURN(true);
1524#endif
1525break;
1526break;
1527default:
1528break;
1529}
1530break;
1531default:
1532break;
1533}
1534break;
1535default:
1536break;
1537}
1538break;
1539default:
1540break;
1541}
1542break;
1543case Opcode::Div32:
1544switch (sizeof...(Arguments)) {
1545case 3:
1546switch (opgenHiddenPtrIdentity(kinds)[0]) {
1547case Arg::Tmp:
1548switch (opgenHiddenPtrIdentity(kinds)[1]) {
1549case Arg::Tmp:
1550switch (opgenHiddenPtrIdentity(kinds)[2]) {
1551case Arg::Tmp:
1552#if CPU(ARM64)
1553OPGEN_RETURN(true);
1554#endif
1555break;
1556break;
1557default:
1558break;
1559}
1560break;
1561default:
1562break;
1563}
1564break;
1565default:
1566break;
1567}
1568break;
1569default:
1570break;
1571}
1572break;
1573case Opcode::UDiv32:
1574switch (sizeof...(Arguments)) {
1575case 3:
1576switch (opgenHiddenPtrIdentity(kinds)[0]) {
1577case Arg::Tmp:
1578switch (opgenHiddenPtrIdentity(kinds)[1]) {
1579case Arg::Tmp:
1580switch (opgenHiddenPtrIdentity(kinds)[2]) {
1581case Arg::Tmp:
1582#if CPU(ARM64)
1583OPGEN_RETURN(true);
1584#endif
1585break;
1586break;
1587default:
1588break;
1589}
1590break;
1591default:
1592break;
1593}
1594break;
1595default:
1596break;
1597}
1598break;
1599default:
1600break;
1601}
1602break;
1603case Opcode::Div64:
1604switch (sizeof...(Arguments)) {
1605case 3:
1606switch (opgenHiddenPtrIdentity(kinds)[0]) {
1607case Arg::Tmp:
1608switch (opgenHiddenPtrIdentity(kinds)[1]) {
1609case Arg::Tmp:
1610switch (opgenHiddenPtrIdentity(kinds)[2]) {
1611case Arg::Tmp:
1612#if CPU(ARM64)
1613OPGEN_RETURN(true);
1614#endif
1615break;
1616break;
1617default:
1618break;
1619}
1620break;
1621default:
1622break;
1623}
1624break;
1625default:
1626break;
1627}
1628break;
1629default:
1630break;
1631}
1632break;
1633case Opcode::UDiv64:
1634switch (sizeof...(Arguments)) {
1635case 3:
1636switch (opgenHiddenPtrIdentity(kinds)[0]) {
1637case Arg::Tmp:
1638switch (opgenHiddenPtrIdentity(kinds)[1]) {
1639case Arg::Tmp:
1640switch (opgenHiddenPtrIdentity(kinds)[2]) {
1641case Arg::Tmp:
1642#if CPU(ARM64)
1643OPGEN_RETURN(true);
1644#endif
1645break;
1646break;
1647default:
1648break;
1649}
1650break;
1651default:
1652break;
1653}
1654break;
1655default:
1656break;
1657}
1658break;
1659default:
1660break;
1661}
1662break;
1663case Opcode::MulDouble:
1664switch (sizeof...(Arguments)) {
1665case 3:
1666switch (opgenHiddenPtrIdentity(kinds)[0]) {
1667case Arg::Tmp:
1668switch (opgenHiddenPtrIdentity(kinds)[1]) {
1669case Arg::Tmp:
1670switch (opgenHiddenPtrIdentity(kinds)[2]) {
1671case Arg::Tmp:
1672OPGEN_RETURN(true);
1673break;
1674break;
1675default:
1676break;
1677}
1678break;
1679case Arg::Addr:
1680case Arg::Stack:
1681case Arg::CallArg:
1682switch (opgenHiddenPtrIdentity(kinds)[2]) {
1683case Arg::Tmp:
1684#if CPU(X86) || CPU(X86_64)
1685OPGEN_RETURN(true);
1686#endif
1687break;
1688break;
1689default:
1690break;
1691}
1692break;
1693default:
1694break;
1695}
1696break;
1697case Arg::Addr:
1698case Arg::Stack:
1699case Arg::CallArg:
1700switch (opgenHiddenPtrIdentity(kinds)[1]) {
1701case Arg::Tmp:
1702switch (opgenHiddenPtrIdentity(kinds)[2]) {
1703case Arg::Tmp:
1704#if CPU(X86) || CPU(X86_64)
1705OPGEN_RETURN(true);
1706#endif
1707break;
1708break;
1709default:
1710break;
1711}
1712break;
1713default:
1714break;
1715}
1716break;
1717case Arg::Index:
1718switch (opgenHiddenPtrIdentity(kinds)[1]) {
1719case Arg::Tmp:
1720switch (opgenHiddenPtrIdentity(kinds)[2]) {
1721case Arg::Tmp:
1722#if CPU(X86) || CPU(X86_64)
1723OPGEN_RETURN(true);
1724#endif
1725break;
1726break;
1727default:
1728break;
1729}
1730break;
1731default:
1732break;
1733}
1734break;
1735default:
1736break;
1737}
1738break;
1739case 2:
1740switch (opgenHiddenPtrIdentity(kinds)[0]) {
1741case Arg::Tmp:
1742switch (opgenHiddenPtrIdentity(kinds)[1]) {
1743case Arg::Tmp:
1744#if CPU(X86) || CPU(X86_64)
1745OPGEN_RETURN(true);
1746#endif
1747break;
1748break;
1749default:
1750break;
1751}
1752break;
1753case Arg::Addr:
1754case Arg::Stack:
1755case Arg::CallArg:
1756switch (opgenHiddenPtrIdentity(kinds)[1]) {
1757case Arg::Tmp:
1758#if CPU(X86) || CPU(X86_64)
1759OPGEN_RETURN(true);
1760#endif
1761break;
1762break;
1763default:
1764break;
1765}
1766break;
1767default:
1768break;
1769}
1770break;
1771default:
1772break;
1773}
1774break;
1775case Opcode::MulFloat:
1776switch (sizeof...(Arguments)) {
1777case 3:
1778switch (opgenHiddenPtrIdentity(kinds)[0]) {
1779case Arg::Tmp:
1780switch (opgenHiddenPtrIdentity(kinds)[1]) {
1781case Arg::Tmp:
1782switch (opgenHiddenPtrIdentity(kinds)[2]) {
1783case Arg::Tmp:
1784OPGEN_RETURN(true);
1785break;
1786break;
1787default:
1788break;
1789}
1790break;
1791case Arg::Addr:
1792case Arg::Stack:
1793case Arg::CallArg:
1794switch (opgenHiddenPtrIdentity(kinds)[2]) {
1795case Arg::Tmp:
1796#if CPU(X86) || CPU(X86_64)
1797OPGEN_RETURN(true);
1798#endif
1799break;
1800break;
1801default:
1802break;
1803}
1804break;
1805default:
1806break;
1807}
1808break;
1809case Arg::Addr:
1810case Arg::Stack:
1811case Arg::CallArg:
1812switch (opgenHiddenPtrIdentity(kinds)[1]) {
1813case Arg::Tmp:
1814switch (opgenHiddenPtrIdentity(kinds)[2]) {
1815case Arg::Tmp:
1816#if CPU(X86) || CPU(X86_64)
1817OPGEN_RETURN(true);
1818#endif
1819break;
1820break;
1821default:
1822break;
1823}
1824break;
1825default:
1826break;
1827}
1828break;
1829case Arg::Index:
1830switch (opgenHiddenPtrIdentity(kinds)[1]) {
1831case Arg::Tmp:
1832switch (opgenHiddenPtrIdentity(kinds)[2]) {
1833case Arg::Tmp:
1834#if CPU(X86) || CPU(X86_64)
1835OPGEN_RETURN(true);
1836#endif
1837break;
1838break;
1839default:
1840break;
1841}
1842break;
1843default:
1844break;
1845}
1846break;
1847default:
1848break;
1849}
1850break;
1851case 2:
1852switch (opgenHiddenPtrIdentity(kinds)[0]) {
1853case Arg::Tmp:
1854switch (opgenHiddenPtrIdentity(kinds)[1]) {
1855case Arg::Tmp:
1856#if CPU(X86) || CPU(X86_64)
1857OPGEN_RETURN(true);
1858#endif
1859break;
1860break;
1861default:
1862break;
1863}
1864break;
1865case Arg::Addr:
1866case Arg::Stack:
1867case Arg::CallArg:
1868switch (opgenHiddenPtrIdentity(kinds)[1]) {
1869case Arg::Tmp:
1870#if CPU(X86) || CPU(X86_64)
1871OPGEN_RETURN(true);
1872#endif
1873break;
1874break;
1875default:
1876break;
1877}
1878break;
1879default:
1880break;
1881}
1882break;
1883default:
1884break;
1885}
1886break;
1887case Opcode::DivDouble:
1888switch (sizeof...(Arguments)) {
1889case 3:
1890switch (opgenHiddenPtrIdentity(kinds)[0]) {
1891case Arg::Tmp:
1892switch (opgenHiddenPtrIdentity(kinds)[1]) {
1893case Arg::Tmp:
1894switch (opgenHiddenPtrIdentity(kinds)[2]) {
1895case Arg::Tmp:
1896#if CPU(ARM64)
1897OPGEN_RETURN(true);
1898#endif
1899break;
1900break;
1901default:
1902break;
1903}
1904break;
1905default:
1906break;
1907}
1908break;
1909default:
1910break;
1911}
1912break;
1913case 2:
1914switch (opgenHiddenPtrIdentity(kinds)[0]) {
1915case Arg::Tmp:
1916switch (opgenHiddenPtrIdentity(kinds)[1]) {
1917case Arg::Tmp:
1918#if CPU(X86) || CPU(X86_64)
1919OPGEN_RETURN(true);
1920#endif
1921break;
1922break;
1923default:
1924break;
1925}
1926break;
1927case Arg::Addr:
1928case Arg::Stack:
1929case Arg::CallArg:
1930switch (opgenHiddenPtrIdentity(kinds)[1]) {
1931case Arg::Tmp:
1932#if CPU(X86) || CPU(X86_64)
1933OPGEN_RETURN(true);
1934#endif
1935break;
1936break;
1937default:
1938break;
1939}
1940break;
1941default:
1942break;
1943}
1944break;
1945default:
1946break;
1947}
1948break;
1949case Opcode::DivFloat:
1950switch (sizeof...(Arguments)) {
1951case 3:
1952switch (opgenHiddenPtrIdentity(kinds)[0]) {
1953case Arg::Tmp:
1954switch (opgenHiddenPtrIdentity(kinds)[1]) {
1955case Arg::Tmp:
1956switch (opgenHiddenPtrIdentity(kinds)[2]) {
1957case Arg::Tmp:
1958#if CPU(ARM64)
1959OPGEN_RETURN(true);
1960#endif
1961break;
1962break;
1963default:
1964break;
1965}
1966break;
1967default:
1968break;
1969}
1970break;
1971default:
1972break;
1973}
1974break;
1975case 2:
1976switch (opgenHiddenPtrIdentity(kinds)[0]) {
1977case Arg::Tmp:
1978switch (opgenHiddenPtrIdentity(kinds)[1]) {
1979case Arg::Tmp:
1980#if CPU(X86) || CPU(X86_64)
1981OPGEN_RETURN(true);
1982#endif
1983break;
1984break;
1985default:
1986break;
1987}
1988break;
1989case Arg::Addr:
1990case Arg::Stack:
1991case Arg::CallArg:
1992switch (opgenHiddenPtrIdentity(kinds)[1]) {
1993case Arg::Tmp:
1994#if CPU(X86) || CPU(X86_64)
1995OPGEN_RETURN(true);
1996#endif
1997break;
1998break;
1999default:
2000break;
2001}
2002break;
2003default:
2004break;
2005}
2006break;
2007default:
2008break;
2009}
2010break;
2011case Opcode::X86ConvertToDoubleWord32:
2012switch (sizeof...(Arguments)) {
2013case 2:
2014switch (opgenHiddenPtrIdentity(kinds)[0]) {
2015case Arg::Tmp:
2016switch (opgenHiddenPtrIdentity(kinds)[1]) {
2017case Arg::Tmp:
2018break;
2019break;
2020default:
2021break;
2022}
2023break;
2024default:
2025break;
2026}
2027break;
2028default:
2029break;
2030}
2031break;
2032case Opcode::X86ConvertToQuadWord64:
2033switch (sizeof...(Arguments)) {
2034case 2:
2035switch (opgenHiddenPtrIdentity(kinds)[0]) {
2036case Arg::Tmp:
2037switch (opgenHiddenPtrIdentity(kinds)[1]) {
2038case Arg::Tmp:
2039break;
2040break;
2041default:
2042break;
2043}
2044break;
2045default:
2046break;
2047}
2048break;
2049default:
2050break;
2051}
2052break;
2053case Opcode::X86Div32:
2054switch (sizeof...(Arguments)) {
2055case 3:
2056switch (opgenHiddenPtrIdentity(kinds)[0]) {
2057case Arg::Tmp:
2058switch (opgenHiddenPtrIdentity(kinds)[1]) {
2059case Arg::Tmp:
2060switch (opgenHiddenPtrIdentity(kinds)[2]) {
2061case Arg::Tmp:
2062break;
2063break;
2064default:
2065break;
2066}
2067break;
2068default:
2069break;
2070}
2071break;
2072default:
2073break;
2074}
2075break;
2076default:
2077break;
2078}
2079break;
2080case Opcode::X86UDiv32:
2081switch (sizeof...(Arguments)) {
2082case 3:
2083switch (opgenHiddenPtrIdentity(kinds)[0]) {
2084case Arg::Tmp:
2085switch (opgenHiddenPtrIdentity(kinds)[1]) {
2086case Arg::Tmp:
2087switch (opgenHiddenPtrIdentity(kinds)[2]) {
2088case Arg::Tmp:
2089break;
2090break;
2091default:
2092break;
2093}
2094break;
2095default:
2096break;
2097}
2098break;
2099default:
2100break;
2101}
2102break;
2103default:
2104break;
2105}
2106break;
2107case Opcode::X86Div64:
2108switch (sizeof...(Arguments)) {
2109case 3:
2110switch (opgenHiddenPtrIdentity(kinds)[0]) {
2111case Arg::Tmp:
2112switch (opgenHiddenPtrIdentity(kinds)[1]) {
2113case Arg::Tmp:
2114switch (opgenHiddenPtrIdentity(kinds)[2]) {
2115case Arg::Tmp:
2116break;
2117break;
2118default:
2119break;
2120}
2121break;
2122default:
2123break;
2124}
2125break;
2126default:
2127break;
2128}
2129break;
2130default:
2131break;
2132}
2133break;
2134case Opcode::X86UDiv64:
2135switch (sizeof...(Arguments)) {
2136case 3:
2137switch (opgenHiddenPtrIdentity(kinds)[0]) {
2138case Arg::Tmp:
2139switch (opgenHiddenPtrIdentity(kinds)[1]) {
2140case Arg::Tmp:
2141switch (opgenHiddenPtrIdentity(kinds)[2]) {
2142case Arg::Tmp:
2143break;
2144break;
2145default:
2146break;
2147}
2148break;
2149default:
2150break;
2151}
2152break;
2153default:
2154break;
2155}
2156break;
2157default:
2158break;
2159}
2160break;
2161case Opcode::Lea32:
2162switch (sizeof...(Arguments)) {
2163case 2:
2164switch (opgenHiddenPtrIdentity(kinds)[0]) {
2165case Arg::Addr:
2166case Arg::Stack:
2167case Arg::CallArg:
2168switch (opgenHiddenPtrIdentity(kinds)[1]) {
2169case Arg::Tmp:
2170if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2171 return false;
2172OPGEN_RETURN(true);
2173break;
2174break;
2175default:
2176break;
2177}
2178break;
2179case Arg::Index:
2180switch (opgenHiddenPtrIdentity(kinds)[1]) {
2181case Arg::Tmp:
2182if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2183 return false;
2184#if CPU(X86) || CPU(X86_64)
2185OPGEN_RETURN(true);
2186#endif
2187break;
2188break;
2189default:
2190break;
2191}
2192break;
2193default:
2194break;
2195}
2196break;
2197default:
2198break;
2199}
2200break;
2201case Opcode::Lea64:
2202switch (sizeof...(Arguments)) {
2203case 2:
2204switch (opgenHiddenPtrIdentity(kinds)[0]) {
2205case Arg::Addr:
2206case Arg::Stack:
2207case Arg::CallArg:
2208switch (opgenHiddenPtrIdentity(kinds)[1]) {
2209case Arg::Tmp:
2210if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2211 return false;
2212OPGEN_RETURN(true);
2213break;
2214break;
2215default:
2216break;
2217}
2218break;
2219case Arg::Index:
2220switch (opgenHiddenPtrIdentity(kinds)[1]) {
2221case Arg::Tmp:
2222if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2223 return false;
2224#if CPU(X86) || CPU(X86_64)
2225OPGEN_RETURN(true);
2226#endif
2227break;
2228break;
2229default:
2230break;
2231}
2232break;
2233default:
2234break;
2235}
2236break;
2237default:
2238break;
2239}
2240break;
2241case Opcode::And32:
2242switch (sizeof...(Arguments)) {
2243case 3:
2244switch (opgenHiddenPtrIdentity(kinds)[0]) {
2245case Arg::Tmp:
2246switch (opgenHiddenPtrIdentity(kinds)[1]) {
2247case Arg::Tmp:
2248switch (opgenHiddenPtrIdentity(kinds)[2]) {
2249case Arg::Tmp:
2250OPGEN_RETURN(true);
2251break;
2252break;
2253default:
2254break;
2255}
2256break;
2257case Arg::Addr:
2258case Arg::Stack:
2259case Arg::CallArg:
2260switch (opgenHiddenPtrIdentity(kinds)[2]) {
2261case Arg::Tmp:
2262#if CPU(X86) || CPU(X86_64)
2263OPGEN_RETURN(true);
2264#endif
2265break;
2266break;
2267default:
2268break;
2269}
2270break;
2271default:
2272break;
2273}
2274break;
2275case Arg::BitImm:
2276switch (opgenHiddenPtrIdentity(kinds)[1]) {
2277case Arg::Tmp:
2278switch (opgenHiddenPtrIdentity(kinds)[2]) {
2279case Arg::Tmp:
2280#if CPU(ARM64)
2281OPGEN_RETURN(true);
2282#endif
2283break;
2284break;
2285default:
2286break;
2287}
2288break;
2289default:
2290break;
2291}
2292break;
2293case Arg::Addr:
2294case Arg::Stack:
2295case Arg::CallArg:
2296switch (opgenHiddenPtrIdentity(kinds)[1]) {
2297case Arg::Tmp:
2298switch (opgenHiddenPtrIdentity(kinds)[2]) {
2299case Arg::Tmp:
2300#if CPU(X86) || CPU(X86_64)
2301OPGEN_RETURN(true);
2302#endif
2303break;
2304break;
2305default:
2306break;
2307}
2308break;
2309default:
2310break;
2311}
2312break;
2313default:
2314break;
2315}
2316break;
2317case 2:
2318switch (opgenHiddenPtrIdentity(kinds)[0]) {
2319case Arg::Tmp:
2320switch (opgenHiddenPtrIdentity(kinds)[1]) {
2321case Arg::Tmp:
2322OPGEN_RETURN(true);
2323break;
2324break;
2325case Arg::Addr:
2326case Arg::Stack:
2327case Arg::CallArg:
2328#if CPU(X86) || CPU(X86_64)
2329OPGEN_RETURN(true);
2330#endif
2331break;
2332break;
2333case Arg::Index:
2334#if CPU(X86) || CPU(X86_64)
2335OPGEN_RETURN(true);
2336#endif
2337break;
2338break;
2339default:
2340break;
2341}
2342break;
2343case Arg::Imm:
2344switch (opgenHiddenPtrIdentity(kinds)[1]) {
2345case Arg::Tmp:
2346#if CPU(X86) || CPU(X86_64)
2347OPGEN_RETURN(true);
2348#endif
2349break;
2350break;
2351case Arg::Addr:
2352case Arg::Stack:
2353case Arg::CallArg:
2354#if CPU(X86) || CPU(X86_64)
2355OPGEN_RETURN(true);
2356#endif
2357break;
2358break;
2359case Arg::Index:
2360#if CPU(X86) || CPU(X86_64)
2361OPGEN_RETURN(true);
2362#endif
2363break;
2364break;
2365default:
2366break;
2367}
2368break;
2369case Arg::Addr:
2370case Arg::Stack:
2371case Arg::CallArg:
2372switch (opgenHiddenPtrIdentity(kinds)[1]) {
2373case Arg::Tmp:
2374#if CPU(X86) || CPU(X86_64)
2375OPGEN_RETURN(true);
2376#endif
2377break;
2378break;
2379default:
2380break;
2381}
2382break;
2383case Arg::Index:
2384switch (opgenHiddenPtrIdentity(kinds)[1]) {
2385case Arg::Tmp:
2386#if CPU(X86) || CPU(X86_64)
2387OPGEN_RETURN(true);
2388#endif
2389break;
2390break;
2391default:
2392break;
2393}
2394break;
2395default:
2396break;
2397}
2398break;
2399default:
2400break;
2401}
2402break;
2403case Opcode::And64:
2404switch (sizeof...(Arguments)) {
2405case 3:
2406switch (opgenHiddenPtrIdentity(kinds)[0]) {
2407case Arg::Tmp:
2408switch (opgenHiddenPtrIdentity(kinds)[1]) {
2409case Arg::Tmp:
2410switch (opgenHiddenPtrIdentity(kinds)[2]) {
2411case Arg::Tmp:
2412#if CPU(X86_64) || CPU(ARM64)
2413OPGEN_RETURN(true);
2414#endif
2415break;
2416break;
2417default:
2418break;
2419}
2420break;
2421default:
2422break;
2423}
2424break;
2425#if USE(JSVALUE64)
2426case Arg::BitImm64:
2427switch (opgenHiddenPtrIdentity(kinds)[1]) {
2428case Arg::Tmp:
2429switch (opgenHiddenPtrIdentity(kinds)[2]) {
2430case Arg::Tmp:
2431#if CPU(ARM64)
2432OPGEN_RETURN(true);
2433#endif
2434break;
2435break;
2436default:
2437break;
2438}
2439break;
2440default:
2441break;
2442}
2443break;
2444#endif // USE(JSVALUE64)
2445default:
2446break;
2447}
2448break;
2449case 2:
2450switch (opgenHiddenPtrIdentity(kinds)[0]) {
2451case Arg::Tmp:
2452switch (opgenHiddenPtrIdentity(kinds)[1]) {
2453case Arg::Tmp:
2454#if CPU(X86_64)
2455OPGEN_RETURN(true);
2456#endif
2457break;
2458break;
2459case Arg::Addr:
2460case Arg::Stack:
2461case Arg::CallArg:
2462#if CPU(X86_64)
2463OPGEN_RETURN(true);
2464#endif
2465break;
2466break;
2467case Arg::Index:
2468#if CPU(X86_64)
2469OPGEN_RETURN(true);
2470#endif
2471break;
2472break;
2473default:
2474break;
2475}
2476break;
2477case Arg::Imm:
2478switch (opgenHiddenPtrIdentity(kinds)[1]) {
2479case Arg::Tmp:
2480#if CPU(X86_64)
2481OPGEN_RETURN(true);
2482#endif
2483break;
2484break;
2485case Arg::Addr:
2486case Arg::Stack:
2487case Arg::CallArg:
2488#if CPU(X86_64)
2489OPGEN_RETURN(true);
2490#endif
2491break;
2492break;
2493case Arg::Index:
2494#if CPU(X86_64)
2495OPGEN_RETURN(true);
2496#endif
2497break;
2498break;
2499default:
2500break;
2501}
2502break;
2503case Arg::Addr:
2504case Arg::Stack:
2505case Arg::CallArg:
2506switch (opgenHiddenPtrIdentity(kinds)[1]) {
2507case Arg::Tmp:
2508#if CPU(X86_64)
2509OPGEN_RETURN(true);
2510#endif
2511break;
2512break;
2513default:
2514break;
2515}
2516break;
2517case Arg::Index:
2518switch (opgenHiddenPtrIdentity(kinds)[1]) {
2519case Arg::Tmp:
2520#if CPU(X86_64)
2521OPGEN_RETURN(true);
2522#endif
2523break;
2524break;
2525default:
2526break;
2527}
2528break;
2529default:
2530break;
2531}
2532break;
2533default:
2534break;
2535}
2536break;
2537case Opcode::AndDouble:
2538switch (sizeof...(Arguments)) {
2539case 3:
2540switch (opgenHiddenPtrIdentity(kinds)[0]) {
2541case Arg::Tmp:
2542switch (opgenHiddenPtrIdentity(kinds)[1]) {
2543case Arg::Tmp:
2544switch (opgenHiddenPtrIdentity(kinds)[2]) {
2545case Arg::Tmp:
2546OPGEN_RETURN(true);
2547break;
2548break;
2549default:
2550break;
2551}
2552break;
2553default:
2554break;
2555}
2556break;
2557default:
2558break;
2559}
2560break;
2561case 2:
2562switch (opgenHiddenPtrIdentity(kinds)[0]) {
2563case Arg::Tmp:
2564switch (opgenHiddenPtrIdentity(kinds)[1]) {
2565case Arg::Tmp:
2566#if CPU(X86) || CPU(X86_64)
2567OPGEN_RETURN(true);
2568#endif
2569break;
2570break;
2571default:
2572break;
2573}
2574break;
2575default:
2576break;
2577}
2578break;
2579default:
2580break;
2581}
2582break;
2583case Opcode::AndFloat:
2584switch (sizeof...(Arguments)) {
2585case 3:
2586switch (opgenHiddenPtrIdentity(kinds)[0]) {
2587case Arg::Tmp:
2588switch (opgenHiddenPtrIdentity(kinds)[1]) {
2589case Arg::Tmp:
2590switch (opgenHiddenPtrIdentity(kinds)[2]) {
2591case Arg::Tmp:
2592OPGEN_RETURN(true);
2593break;
2594break;
2595default:
2596break;
2597}
2598break;
2599default:
2600break;
2601}
2602break;
2603default:
2604break;
2605}
2606break;
2607case 2:
2608switch (opgenHiddenPtrIdentity(kinds)[0]) {
2609case Arg::Tmp:
2610switch (opgenHiddenPtrIdentity(kinds)[1]) {
2611case Arg::Tmp:
2612#if CPU(X86) || CPU(X86_64)
2613OPGEN_RETURN(true);
2614#endif
2615break;
2616break;
2617default:
2618break;
2619}
2620break;
2621default:
2622break;
2623}
2624break;
2625default:
2626break;
2627}
2628break;
2629case Opcode::OrDouble:
2630switch (sizeof...(Arguments)) {
2631case 3:
2632switch (opgenHiddenPtrIdentity(kinds)[0]) {
2633case Arg::Tmp:
2634switch (opgenHiddenPtrIdentity(kinds)[1]) {
2635case Arg::Tmp:
2636switch (opgenHiddenPtrIdentity(kinds)[2]) {
2637case Arg::Tmp:
2638OPGEN_RETURN(true);
2639break;
2640break;
2641default:
2642break;
2643}
2644break;
2645default:
2646break;
2647}
2648break;
2649default:
2650break;
2651}
2652break;
2653case 2:
2654switch (opgenHiddenPtrIdentity(kinds)[0]) {
2655case Arg::Tmp:
2656switch (opgenHiddenPtrIdentity(kinds)[1]) {
2657case Arg::Tmp:
2658#if CPU(X86) || CPU(X86_64)
2659OPGEN_RETURN(true);
2660#endif
2661break;
2662break;
2663default:
2664break;
2665}
2666break;
2667default:
2668break;
2669}
2670break;
2671default:
2672break;
2673}
2674break;
2675case Opcode::OrFloat:
2676switch (sizeof...(Arguments)) {
2677case 3:
2678switch (opgenHiddenPtrIdentity(kinds)[0]) {
2679case Arg::Tmp:
2680switch (opgenHiddenPtrIdentity(kinds)[1]) {
2681case Arg::Tmp:
2682switch (opgenHiddenPtrIdentity(kinds)[2]) {
2683case Arg::Tmp:
2684OPGEN_RETURN(true);
2685break;
2686break;
2687default:
2688break;
2689}
2690break;
2691default:
2692break;
2693}
2694break;
2695default:
2696break;
2697}
2698break;
2699case 2:
2700switch (opgenHiddenPtrIdentity(kinds)[0]) {
2701case Arg::Tmp:
2702switch (opgenHiddenPtrIdentity(kinds)[1]) {
2703case Arg::Tmp:
2704#if CPU(X86) || CPU(X86_64)
2705OPGEN_RETURN(true);
2706#endif
2707break;
2708break;
2709default:
2710break;
2711}
2712break;
2713default:
2714break;
2715}
2716break;
2717default:
2718break;
2719}
2720break;
2721case Opcode::XorDouble:
2722switch (sizeof...(Arguments)) {
2723case 3:
2724switch (opgenHiddenPtrIdentity(kinds)[0]) {
2725case Arg::Tmp:
2726switch (opgenHiddenPtrIdentity(kinds)[1]) {
2727case Arg::Tmp:
2728switch (opgenHiddenPtrIdentity(kinds)[2]) {
2729case Arg::Tmp:
2730#if CPU(X86) || CPU(X86_64)
2731OPGEN_RETURN(true);
2732#endif
2733break;
2734break;
2735default:
2736break;
2737}
2738break;
2739default:
2740break;
2741}
2742break;
2743default:
2744break;
2745}
2746break;
2747case 2:
2748switch (opgenHiddenPtrIdentity(kinds)[0]) {
2749case Arg::Tmp:
2750switch (opgenHiddenPtrIdentity(kinds)[1]) {
2751case Arg::Tmp:
2752#if CPU(X86) || CPU(X86_64)
2753OPGEN_RETURN(true);
2754#endif
2755break;
2756break;
2757default:
2758break;
2759}
2760break;
2761default:
2762break;
2763}
2764break;
2765default:
2766break;
2767}
2768break;
2769case Opcode::XorFloat:
2770switch (sizeof...(Arguments)) {
2771case 3:
2772switch (opgenHiddenPtrIdentity(kinds)[0]) {
2773case Arg::Tmp:
2774switch (opgenHiddenPtrIdentity(kinds)[1]) {
2775case Arg::Tmp:
2776switch (opgenHiddenPtrIdentity(kinds)[2]) {
2777case Arg::Tmp:
2778#if CPU(X86) || CPU(X86_64)
2779OPGEN_RETURN(true);
2780#endif
2781break;
2782break;
2783default:
2784break;
2785}
2786break;
2787default:
2788break;
2789}
2790break;
2791default:
2792break;
2793}
2794break;
2795case 2:
2796switch (opgenHiddenPtrIdentity(kinds)[0]) {
2797case Arg::Tmp:
2798switch (opgenHiddenPtrIdentity(kinds)[1]) {
2799case Arg::Tmp:
2800#if CPU(X86) || CPU(X86_64)
2801OPGEN_RETURN(true);
2802#endif
2803break;
2804break;
2805default:
2806break;
2807}
2808break;
2809default:
2810break;
2811}
2812break;
2813default:
2814break;
2815}
2816break;
2817case Opcode::Lshift32:
2818switch (sizeof...(Arguments)) {
2819case 3:
2820switch (opgenHiddenPtrIdentity(kinds)[0]) {
2821case Arg::Tmp:
2822switch (opgenHiddenPtrIdentity(kinds)[1]) {
2823case Arg::Tmp:
2824switch (opgenHiddenPtrIdentity(kinds)[2]) {
2825case Arg::Tmp:
2826#if CPU(ARM64)
2827OPGEN_RETURN(true);
2828#endif
2829break;
2830break;
2831default:
2832break;
2833}
2834break;
2835case Arg::Imm:
2836switch (opgenHiddenPtrIdentity(kinds)[2]) {
2837case Arg::Tmp:
2838#if CPU(ARM64)
2839OPGEN_RETURN(true);
2840#endif
2841break;
2842break;
2843default:
2844break;
2845}
2846break;
2847default:
2848break;
2849}
2850break;
2851default:
2852break;
2853}
2854break;
2855case 2:
2856switch (opgenHiddenPtrIdentity(kinds)[0]) {
2857case Arg::Tmp:
2858switch (opgenHiddenPtrIdentity(kinds)[1]) {
2859case Arg::Tmp:
2860break;
2861break;
2862default:
2863break;
2864}
2865break;
2866case Arg::Imm:
2867switch (opgenHiddenPtrIdentity(kinds)[1]) {
2868case Arg::Tmp:
2869#if CPU(X86) || CPU(X86_64)
2870OPGEN_RETURN(true);
2871#endif
2872break;
2873break;
2874default:
2875break;
2876}
2877break;
2878default:
2879break;
2880}
2881break;
2882default:
2883break;
2884}
2885break;
2886case Opcode::Lshift64:
2887switch (sizeof...(Arguments)) {
2888case 3:
2889switch (opgenHiddenPtrIdentity(kinds)[0]) {
2890case Arg::Tmp:
2891switch (opgenHiddenPtrIdentity(kinds)[1]) {
2892case Arg::Tmp:
2893switch (opgenHiddenPtrIdentity(kinds)[2]) {
2894case Arg::Tmp:
2895#if CPU(ARM64)
2896OPGEN_RETURN(true);
2897#endif
2898break;
2899break;
2900default:
2901break;
2902}
2903break;
2904case Arg::Imm:
2905switch (opgenHiddenPtrIdentity(kinds)[2]) {
2906case Arg::Tmp:
2907#if CPU(ARM64)
2908OPGEN_RETURN(true);
2909#endif
2910break;
2911break;
2912default:
2913break;
2914}
2915break;
2916default:
2917break;
2918}
2919break;
2920default:
2921break;
2922}
2923break;
2924case 2:
2925switch (opgenHiddenPtrIdentity(kinds)[0]) {
2926case Arg::Tmp:
2927switch (opgenHiddenPtrIdentity(kinds)[1]) {
2928case Arg::Tmp:
2929break;
2930break;
2931default:
2932break;
2933}
2934break;
2935case Arg::Imm:
2936switch (opgenHiddenPtrIdentity(kinds)[1]) {
2937case Arg::Tmp:
2938#if CPU(X86_64)
2939OPGEN_RETURN(true);
2940#endif
2941break;
2942break;
2943default:
2944break;
2945}
2946break;
2947default:
2948break;
2949}
2950break;
2951default:
2952break;
2953}
2954break;
2955case Opcode::Rshift32:
2956switch (sizeof...(Arguments)) {
2957case 3:
2958switch (opgenHiddenPtrIdentity(kinds)[0]) {
2959case Arg::Tmp:
2960switch (opgenHiddenPtrIdentity(kinds)[1]) {
2961case Arg::Tmp:
2962switch (opgenHiddenPtrIdentity(kinds)[2]) {
2963case Arg::Tmp:
2964#if CPU(ARM64)
2965OPGEN_RETURN(true);
2966#endif
2967break;
2968break;
2969default:
2970break;
2971}
2972break;
2973case Arg::Imm:
2974switch (opgenHiddenPtrIdentity(kinds)[2]) {
2975case Arg::Tmp:
2976#if CPU(ARM64)
2977OPGEN_RETURN(true);
2978#endif
2979break;
2980break;
2981default:
2982break;
2983}
2984break;
2985default:
2986break;
2987}
2988break;
2989default:
2990break;
2991}
2992break;
2993case 2:
2994switch (opgenHiddenPtrIdentity(kinds)[0]) {
2995case Arg::Tmp:
2996switch (opgenHiddenPtrIdentity(kinds)[1]) {
2997case Arg::Tmp:
2998break;
2999break;
3000default:
3001break;
3002}
3003break;
3004case Arg::Imm:
3005switch (opgenHiddenPtrIdentity(kinds)[1]) {
3006case Arg::Tmp:
3007#if CPU(X86) || CPU(X86_64)
3008OPGEN_RETURN(true);
3009#endif
3010break;
3011break;
3012default:
3013break;
3014}
3015break;
3016default:
3017break;
3018}
3019break;
3020default:
3021break;
3022}
3023break;
3024case Opcode::Rshift64:
3025switch (sizeof...(Arguments)) {
3026case 3:
3027switch (opgenHiddenPtrIdentity(kinds)[0]) {
3028case Arg::Tmp:
3029switch (opgenHiddenPtrIdentity(kinds)[1]) {
3030case Arg::Tmp:
3031switch (opgenHiddenPtrIdentity(kinds)[2]) {
3032case Arg::Tmp:
3033#if CPU(ARM64)
3034OPGEN_RETURN(true);
3035#endif
3036break;
3037break;
3038default:
3039break;
3040}
3041break;
3042case Arg::Imm:
3043switch (opgenHiddenPtrIdentity(kinds)[2]) {
3044case Arg::Tmp:
3045#if CPU(ARM64)
3046OPGEN_RETURN(true);
3047#endif
3048break;
3049break;
3050default:
3051break;
3052}
3053break;
3054default:
3055break;
3056}
3057break;
3058default:
3059break;
3060}
3061break;
3062case 2:
3063switch (opgenHiddenPtrIdentity(kinds)[0]) {
3064case Arg::Tmp:
3065switch (opgenHiddenPtrIdentity(kinds)[1]) {
3066case Arg::Tmp:
3067break;
3068break;
3069default:
3070break;
3071}
3072break;
3073case Arg::Imm:
3074switch (opgenHiddenPtrIdentity(kinds)[1]) {
3075case Arg::Tmp:
3076#if CPU(X86_64)
3077OPGEN_RETURN(true);
3078#endif
3079break;
3080break;
3081default:
3082break;
3083}
3084break;
3085default:
3086break;
3087}
3088break;
3089default:
3090break;
3091}
3092break;
3093case Opcode::Urshift32:
3094switch (sizeof...(Arguments)) {
3095case 3:
3096switch (opgenHiddenPtrIdentity(kinds)[0]) {
3097case Arg::Tmp:
3098switch (opgenHiddenPtrIdentity(kinds)[1]) {
3099case Arg::Tmp:
3100switch (opgenHiddenPtrIdentity(kinds)[2]) {
3101case Arg::Tmp:
3102#if CPU(ARM64)
3103OPGEN_RETURN(true);
3104#endif
3105break;
3106break;
3107default:
3108break;
3109}
3110break;
3111case Arg::Imm:
3112switch (opgenHiddenPtrIdentity(kinds)[2]) {
3113case Arg::Tmp:
3114#if CPU(ARM64)
3115OPGEN_RETURN(true);
3116#endif
3117break;
3118break;
3119default:
3120break;
3121}
3122break;
3123default:
3124break;
3125}
3126break;
3127default:
3128break;
3129}
3130break;
3131case 2:
3132switch (opgenHiddenPtrIdentity(kinds)[0]) {
3133case Arg::Tmp:
3134switch (opgenHiddenPtrIdentity(kinds)[1]) {
3135case Arg::Tmp:
3136break;
3137break;
3138default:
3139break;
3140}
3141break;
3142case Arg::Imm:
3143switch (opgenHiddenPtrIdentity(kinds)[1]) {
3144case Arg::Tmp:
3145#if CPU(X86) || CPU(X86_64)
3146OPGEN_RETURN(true);
3147#endif
3148break;
3149break;
3150default:
3151break;
3152}
3153break;
3154default:
3155break;
3156}
3157break;
3158default:
3159break;
3160}
3161break;
3162case Opcode::Urshift64:
3163switch (sizeof...(Arguments)) {
3164case 3:
3165switch (opgenHiddenPtrIdentity(kinds)[0]) {
3166case Arg::Tmp:
3167switch (opgenHiddenPtrIdentity(kinds)[1]) {
3168case Arg::Tmp:
3169switch (opgenHiddenPtrIdentity(kinds)[2]) {
3170case Arg::Tmp:
3171#if CPU(ARM64)
3172OPGEN_RETURN(true);
3173#endif
3174break;
3175break;
3176default:
3177break;
3178}
3179break;
3180case Arg::Imm:
3181switch (opgenHiddenPtrIdentity(kinds)[2]) {
3182case Arg::Tmp:
3183#if CPU(ARM64)
3184OPGEN_RETURN(true);
3185#endif
3186break;
3187break;
3188default:
3189break;
3190}
3191break;
3192default:
3193break;
3194}
3195break;
3196default:
3197break;
3198}
3199break;
3200case 2:
3201switch (opgenHiddenPtrIdentity(kinds)[0]) {
3202case Arg::Tmp:
3203switch (opgenHiddenPtrIdentity(kinds)[1]) {
3204case Arg::Tmp:
3205break;
3206break;
3207default:
3208break;
3209}
3210break;
3211case Arg::Imm:
3212switch (opgenHiddenPtrIdentity(kinds)[1]) {
3213case Arg::Tmp:
3214#if CPU(X86_64)
3215OPGEN_RETURN(true);
3216#endif
3217break;
3218break;
3219default:
3220break;
3221}
3222break;
3223default:
3224break;
3225}
3226break;
3227default:
3228break;
3229}
3230break;
3231case Opcode::RotateRight32:
3232switch (sizeof...(Arguments)) {
3233case 2:
3234switch (opgenHiddenPtrIdentity(kinds)[0]) {
3235case Arg::Tmp:
3236switch (opgenHiddenPtrIdentity(kinds)[1]) {
3237case Arg::Tmp:
3238break;
3239break;
3240default:
3241break;
3242}
3243break;
3244case Arg::Imm:
3245switch (opgenHiddenPtrIdentity(kinds)[1]) {
3246case Arg::Tmp:
3247#if CPU(X86_64)
3248OPGEN_RETURN(true);
3249#endif
3250break;
3251break;
3252default:
3253break;
3254}
3255break;
3256default:
3257break;
3258}
3259break;
3260case 3:
3261switch (opgenHiddenPtrIdentity(kinds)[0]) {
3262case Arg::Tmp:
3263switch (opgenHiddenPtrIdentity(kinds)[1]) {
3264case Arg::Tmp:
3265switch (opgenHiddenPtrIdentity(kinds)[2]) {
3266case Arg::Tmp:
3267#if CPU(ARM64)
3268OPGEN_RETURN(true);
3269#endif
3270break;
3271break;
3272default:
3273break;
3274}
3275break;
3276case Arg::Imm:
3277switch (opgenHiddenPtrIdentity(kinds)[2]) {
3278case Arg::Tmp:
3279#if CPU(ARM64)
3280OPGEN_RETURN(true);
3281#endif
3282break;
3283break;
3284default:
3285break;
3286}
3287break;
3288default:
3289break;
3290}
3291break;
3292default:
3293break;
3294}
3295break;
3296default:
3297break;
3298}
3299break;
3300case Opcode::RotateRight64:
3301switch (sizeof...(Arguments)) {
3302case 2:
3303switch (opgenHiddenPtrIdentity(kinds)[0]) {
3304case Arg::Tmp:
3305switch (opgenHiddenPtrIdentity(kinds)[1]) {
3306case Arg::Tmp:
3307break;
3308break;
3309default:
3310break;
3311}
3312break;
3313case Arg::Imm:
3314switch (opgenHiddenPtrIdentity(kinds)[1]) {
3315case Arg::Tmp:
3316#if CPU(X86_64)
3317OPGEN_RETURN(true);
3318#endif
3319break;
3320break;
3321default:
3322break;
3323}
3324break;
3325default:
3326break;
3327}
3328break;
3329case 3:
3330switch (opgenHiddenPtrIdentity(kinds)[0]) {
3331case Arg::Tmp:
3332switch (opgenHiddenPtrIdentity(kinds)[1]) {
3333case Arg::Tmp:
3334switch (opgenHiddenPtrIdentity(kinds)[2]) {
3335case Arg::Tmp:
3336#if CPU(ARM64)
3337OPGEN_RETURN(true);
3338#endif
3339break;
3340break;
3341default:
3342break;
3343}
3344break;
3345case Arg::Imm:
3346switch (opgenHiddenPtrIdentity(kinds)[2]) {
3347case Arg::Tmp:
3348#if CPU(ARM64)
3349OPGEN_RETURN(true);
3350#endif
3351break;
3352break;
3353default:
3354break;
3355}
3356break;
3357default:
3358break;
3359}
3360break;
3361default:
3362break;
3363}
3364break;
3365default:
3366break;
3367}
3368break;
3369case Opcode::RotateLeft32:
3370switch (sizeof...(Arguments)) {
3371case 2:
3372switch (opgenHiddenPtrIdentity(kinds)[0]) {
3373case Arg::Tmp:
3374switch (opgenHiddenPtrIdentity(kinds)[1]) {
3375case Arg::Tmp:
3376break;
3377break;
3378default:
3379break;
3380}
3381break;
3382case Arg::Imm:
3383switch (opgenHiddenPtrIdentity(kinds)[1]) {
3384case Arg::Tmp:
3385#if CPU(X86_64)
3386OPGEN_RETURN(true);
3387#endif
3388break;
3389break;
3390default:
3391break;
3392}
3393break;
3394default:
3395break;
3396}
3397break;
3398default:
3399break;
3400}
3401break;
3402case Opcode::RotateLeft64:
3403switch (sizeof...(Arguments)) {
3404case 2:
3405switch (opgenHiddenPtrIdentity(kinds)[0]) {
3406case Arg::Tmp:
3407switch (opgenHiddenPtrIdentity(kinds)[1]) {
3408case Arg::Tmp:
3409break;
3410break;
3411default:
3412break;
3413}
3414break;
3415case Arg::Imm:
3416switch (opgenHiddenPtrIdentity(kinds)[1]) {
3417case Arg::Tmp:
3418#if CPU(X86_64)
3419OPGEN_RETURN(true);
3420#endif
3421break;
3422break;
3423default:
3424break;
3425}
3426break;
3427default:
3428break;
3429}
3430break;
3431default:
3432break;
3433}
3434break;
3435case Opcode::Or32:
3436switch (sizeof...(Arguments)) {
3437case 3:
3438switch (opgenHiddenPtrIdentity(kinds)[0]) {
3439case Arg::Tmp:
3440switch (opgenHiddenPtrIdentity(kinds)[1]) {
3441case Arg::Tmp:
3442switch (opgenHiddenPtrIdentity(kinds)[2]) {
3443case Arg::Tmp:
3444OPGEN_RETURN(true);
3445break;
3446break;
3447default:
3448break;
3449}
3450break;
3451case Arg::Addr:
3452case Arg::Stack:
3453case Arg::CallArg:
3454switch (opgenHiddenPtrIdentity(kinds)[2]) {
3455case Arg::Tmp:
3456#if CPU(X86) || CPU(X86_64)
3457OPGEN_RETURN(true);
3458#endif
3459break;
3460break;
3461default:
3462break;
3463}
3464break;
3465default:
3466break;
3467}
3468break;
3469case Arg::BitImm:
3470switch (opgenHiddenPtrIdentity(kinds)[1]) {
3471case Arg::Tmp:
3472switch (opgenHiddenPtrIdentity(kinds)[2]) {
3473case Arg::Tmp:
3474#if CPU(ARM64)
3475OPGEN_RETURN(true);
3476#endif
3477break;
3478break;
3479default:
3480break;
3481}
3482break;
3483default:
3484break;
3485}
3486break;
3487case Arg::Addr:
3488case Arg::Stack:
3489case Arg::CallArg:
3490switch (opgenHiddenPtrIdentity(kinds)[1]) {
3491case Arg::Tmp:
3492switch (opgenHiddenPtrIdentity(kinds)[2]) {
3493case Arg::Tmp:
3494#if CPU(X86) || CPU(X86_64)
3495OPGEN_RETURN(true);
3496#endif
3497break;
3498break;
3499default:
3500break;
3501}
3502break;
3503default:
3504break;
3505}
3506break;
3507default:
3508break;
3509}
3510break;
3511case 2:
3512switch (opgenHiddenPtrIdentity(kinds)[0]) {
3513case Arg::Tmp:
3514switch (opgenHiddenPtrIdentity(kinds)[1]) {
3515case Arg::Tmp:
3516OPGEN_RETURN(true);
3517break;
3518break;
3519case Arg::Addr:
3520case Arg::Stack:
3521case Arg::CallArg:
3522#if CPU(X86) || CPU(X86_64)
3523OPGEN_RETURN(true);
3524#endif
3525break;
3526break;
3527case Arg::Index:
3528#if CPU(X86) || CPU(X86_64)
3529OPGEN_RETURN(true);
3530#endif
3531break;
3532break;
3533default:
3534break;
3535}
3536break;
3537case Arg::Imm:
3538switch (opgenHiddenPtrIdentity(kinds)[1]) {
3539case Arg::Tmp:
3540#if CPU(X86) || CPU(X86_64)
3541OPGEN_RETURN(true);
3542#endif
3543break;
3544break;
3545case Arg::Addr:
3546case Arg::Stack:
3547case Arg::CallArg:
3548#if CPU(X86) || CPU(X86_64)
3549OPGEN_RETURN(true);
3550#endif
3551break;
3552break;
3553case Arg::Index:
3554#if CPU(X86) || CPU(X86_64)
3555OPGEN_RETURN(true);
3556#endif
3557break;
3558break;
3559default:
3560break;
3561}
3562break;
3563case Arg::Addr:
3564case Arg::Stack:
3565case Arg::CallArg:
3566switch (opgenHiddenPtrIdentity(kinds)[1]) {
3567case Arg::Tmp:
3568#if CPU(X86) || CPU(X86_64)
3569OPGEN_RETURN(true);
3570#endif
3571break;
3572break;
3573default:
3574break;
3575}
3576break;
3577case Arg::Index:
3578switch (opgenHiddenPtrIdentity(kinds)[1]) {
3579case Arg::Tmp:
3580#if CPU(X86) || CPU(X86_64)
3581OPGEN_RETURN(true);
3582#endif
3583break;
3584break;
3585default:
3586break;
3587}
3588break;
3589default:
3590break;
3591}
3592break;
3593default:
3594break;
3595}
3596break;
3597case Opcode::Or64:
3598switch (sizeof...(Arguments)) {
3599case 3:
3600switch (opgenHiddenPtrIdentity(kinds)[0]) {
3601case Arg::Tmp:
3602switch (opgenHiddenPtrIdentity(kinds)[1]) {
3603case Arg::Tmp:
3604switch (opgenHiddenPtrIdentity(kinds)[2]) {
3605case Arg::Tmp:
3606#if CPU(X86_64) || CPU(ARM64)
3607OPGEN_RETURN(true);
3608#endif
3609break;
3610break;
3611default:
3612break;
3613}
3614break;
3615default:
3616break;
3617}
3618break;
3619#if USE(JSVALUE64)
3620case Arg::BitImm64:
3621switch (opgenHiddenPtrIdentity(kinds)[1]) {
3622case Arg::Tmp:
3623switch (opgenHiddenPtrIdentity(kinds)[2]) {
3624case Arg::Tmp:
3625#if CPU(ARM64)
3626OPGEN_RETURN(true);
3627#endif
3628break;
3629break;
3630default:
3631break;
3632}
3633break;
3634default:
3635break;
3636}
3637break;
3638#endif // USE(JSVALUE64)
3639default:
3640break;
3641}
3642break;
3643case 2:
3644switch (opgenHiddenPtrIdentity(kinds)[0]) {
3645case Arg::Tmp:
3646switch (opgenHiddenPtrIdentity(kinds)[1]) {
3647case Arg::Tmp:
3648#if CPU(X86_64) || CPU(ARM64)
3649OPGEN_RETURN(true);
3650#endif
3651break;
3652break;
3653case Arg::Addr:
3654case Arg::Stack:
3655case Arg::CallArg:
3656#if CPU(X86_64)
3657OPGEN_RETURN(true);
3658#endif
3659break;
3660break;
3661case Arg::Index:
3662#if CPU(X86_64)
3663OPGEN_RETURN(true);
3664#endif
3665break;
3666break;
3667default:
3668break;
3669}
3670break;
3671case Arg::Imm:
3672switch (opgenHiddenPtrIdentity(kinds)[1]) {
3673case Arg::Tmp:
3674#if CPU(X86_64)
3675OPGEN_RETURN(true);
3676#endif
3677break;
3678break;
3679case Arg::Addr:
3680case Arg::Stack:
3681case Arg::CallArg:
3682#if CPU(X86_64)
3683OPGEN_RETURN(true);
3684#endif
3685break;
3686break;
3687case Arg::Index:
3688#if CPU(X86_64)
3689OPGEN_RETURN(true);
3690#endif
3691break;
3692break;
3693default:
3694break;
3695}
3696break;
3697case Arg::Addr:
3698case Arg::Stack:
3699case Arg::CallArg:
3700switch (opgenHiddenPtrIdentity(kinds)[1]) {
3701case Arg::Tmp:
3702#if CPU(X86_64)
3703OPGEN_RETURN(true);
3704#endif
3705break;
3706break;
3707default:
3708break;
3709}
3710break;
3711case Arg::Index:
3712switch (opgenHiddenPtrIdentity(kinds)[1]) {
3713case Arg::Tmp:
3714#if CPU(X86_64)
3715OPGEN_RETURN(true);
3716#endif
3717break;
3718break;
3719default:
3720break;
3721}
3722break;
3723default:
3724break;
3725}
3726break;
3727default:
3728break;
3729}
3730break;
3731case Opcode::Xor32:
3732switch (sizeof...(Arguments)) {
3733case 3:
3734switch (opgenHiddenPtrIdentity(kinds)[0]) {
3735case Arg::Tmp:
3736switch (opgenHiddenPtrIdentity(kinds)[1]) {
3737case Arg::Tmp:
3738switch (opgenHiddenPtrIdentity(kinds)[2]) {
3739case Arg::Tmp:
3740OPGEN_RETURN(true);
3741break;
3742break;
3743default:
3744break;
3745}
3746break;
3747case Arg::Addr:
3748case Arg::Stack:
3749case Arg::CallArg:
3750switch (opgenHiddenPtrIdentity(kinds)[2]) {
3751case Arg::Tmp:
3752#if CPU(X86) || CPU(X86_64)
3753OPGEN_RETURN(true);
3754#endif
3755break;
3756break;
3757default:
3758break;
3759}
3760break;
3761default:
3762break;
3763}
3764break;
3765case Arg::BitImm:
3766switch (opgenHiddenPtrIdentity(kinds)[1]) {
3767case Arg::Tmp:
3768switch (opgenHiddenPtrIdentity(kinds)[2]) {
3769case Arg::Tmp:
3770#if CPU(ARM64)
3771OPGEN_RETURN(true);
3772#endif
3773break;
3774break;
3775default:
3776break;
3777}
3778break;
3779default:
3780break;
3781}
3782break;
3783case Arg::Addr:
3784case Arg::Stack:
3785case Arg::CallArg:
3786switch (opgenHiddenPtrIdentity(kinds)[1]) {
3787case Arg::Tmp:
3788switch (opgenHiddenPtrIdentity(kinds)[2]) {
3789case Arg::Tmp:
3790#if CPU(X86) || CPU(X86_64)
3791OPGEN_RETURN(true);
3792#endif
3793break;
3794break;
3795default:
3796break;
3797}
3798break;
3799default:
3800break;
3801}
3802break;
3803default:
3804break;
3805}
3806break;
3807case 2:
3808switch (opgenHiddenPtrIdentity(kinds)[0]) {
3809case Arg::Tmp:
3810switch (opgenHiddenPtrIdentity(kinds)[1]) {
3811case Arg::Tmp:
3812OPGEN_RETURN(true);
3813break;
3814break;
3815case Arg::Addr:
3816case Arg::Stack:
3817case Arg::CallArg:
3818#if CPU(X86) || CPU(X86_64)
3819OPGEN_RETURN(true);
3820#endif
3821break;
3822break;
3823case Arg::Index:
3824#if CPU(X86) || CPU(X86_64)
3825OPGEN_RETURN(true);
3826#endif
3827break;
3828break;
3829default:
3830break;
3831}
3832break;
3833case Arg::Imm:
3834switch (opgenHiddenPtrIdentity(kinds)[1]) {
3835case Arg::Tmp:
3836#if CPU(X86) || CPU(X86_64)
3837OPGEN_RETURN(true);
3838#endif
3839break;
3840break;
3841case Arg::Addr:
3842case Arg::Stack:
3843case Arg::CallArg:
3844#if CPU(X86) || CPU(X86_64)
3845OPGEN_RETURN(true);
3846#endif
3847break;
3848break;
3849case Arg::Index:
3850#if CPU(X86) || CPU(X86_64)
3851OPGEN_RETURN(true);
3852#endif
3853break;
3854break;
3855default:
3856break;
3857}
3858break;
3859case Arg::Addr:
3860case Arg::Stack:
3861case Arg::CallArg:
3862switch (opgenHiddenPtrIdentity(kinds)[1]) {
3863case Arg::Tmp:
3864#if CPU(X86) || CPU(X86_64)
3865OPGEN_RETURN(true);
3866#endif
3867break;
3868break;
3869default:
3870break;
3871}
3872break;
3873case Arg::Index:
3874switch (opgenHiddenPtrIdentity(kinds)[1]) {
3875case Arg::Tmp:
3876#if CPU(X86) || CPU(X86_64)
3877OPGEN_RETURN(true);
3878#endif
3879break;
3880break;
3881default:
3882break;
3883}
3884break;
3885default:
3886break;
3887}
3888break;
3889default:
3890break;
3891}
3892break;
3893case Opcode::Xor64:
3894switch (sizeof...(Arguments)) {
3895case 3:
3896switch (opgenHiddenPtrIdentity(kinds)[0]) {
3897case Arg::Tmp:
3898switch (opgenHiddenPtrIdentity(kinds)[1]) {
3899case Arg::Tmp:
3900switch (opgenHiddenPtrIdentity(kinds)[2]) {
3901case Arg::Tmp:
3902#if CPU(X86_64) || CPU(ARM64)
3903OPGEN_RETURN(true);
3904#endif
3905break;
3906break;
3907default:
3908break;
3909}
3910break;
3911default:
3912break;
3913}
3914break;
3915#if USE(JSVALUE64)
3916case Arg::BitImm64:
3917switch (opgenHiddenPtrIdentity(kinds)[1]) {
3918case Arg::Tmp:
3919switch (opgenHiddenPtrIdentity(kinds)[2]) {
3920case Arg::Tmp:
3921#if CPU(ARM64)
3922OPGEN_RETURN(true);
3923#endif
3924break;
3925break;
3926default:
3927break;
3928}
3929break;
3930default:
3931break;
3932}
3933break;
3934#endif // USE(JSVALUE64)
3935default:
3936break;
3937}
3938break;
3939case 2:
3940switch (opgenHiddenPtrIdentity(kinds)[0]) {
3941case Arg::Tmp:
3942switch (opgenHiddenPtrIdentity(kinds)[1]) {
3943case Arg::Tmp:
3944#if CPU(X86_64) || CPU(ARM64)
3945OPGEN_RETURN(true);
3946#endif
3947break;
3948break;
3949case Arg::Addr:
3950case Arg::Stack:
3951case Arg::CallArg:
3952#if CPU(X86_64)
3953OPGEN_RETURN(true);
3954#endif
3955break;
3956break;
3957case Arg::Index:
3958#if CPU(X86_64)
3959OPGEN_RETURN(true);
3960#endif
3961break;
3962break;
3963default:
3964break;
3965}
3966break;
3967case Arg::Addr:
3968case Arg::Stack:
3969case Arg::CallArg:
3970switch (opgenHiddenPtrIdentity(kinds)[1]) {
3971case Arg::Tmp:
3972#if CPU(X86_64)
3973OPGEN_RETURN(true);
3974#endif
3975break;
3976break;
3977default:
3978break;
3979}
3980break;
3981case Arg::Index:
3982switch (opgenHiddenPtrIdentity(kinds)[1]) {
3983case Arg::Tmp:
3984#if CPU(X86_64)
3985OPGEN_RETURN(true);
3986#endif
3987break;
3988break;
3989default:
3990break;
3991}
3992break;
3993case Arg::Imm:
3994switch (opgenHiddenPtrIdentity(kinds)[1]) {
3995case Arg::Addr:
3996case Arg::Stack:
3997case Arg::CallArg:
3998#if CPU(X86_64)
3999OPGEN_RETURN(true);
4000#endif
4001break;
4002break;
4003case Arg::Index:
4004#if CPU(X86_64)
4005OPGEN_RETURN(true);
4006#endif
4007break;
4008break;
4009case Arg::Tmp:
4010#if CPU(X86_64)
4011OPGEN_RETURN(true);
4012#endif
4013break;
4014break;
4015default:
4016break;
4017}
4018break;
4019default:
4020break;
4021}
4022break;
4023default:
4024break;
4025}
4026break;
4027case Opcode::Not32:
4028switch (sizeof...(Arguments)) {
4029case 2:
4030switch (opgenHiddenPtrIdentity(kinds)[0]) {
4031case Arg::Tmp:
4032switch (opgenHiddenPtrIdentity(kinds)[1]) {
4033case Arg::Tmp:
4034#if CPU(ARM64)
4035OPGEN_RETURN(true);
4036#endif
4037break;
4038break;
4039default:
4040break;
4041}
4042break;
4043default:
4044break;
4045}
4046break;
4047case 1:
4048switch (opgenHiddenPtrIdentity(kinds)[0]) {
4049case Arg::Tmp:
4050#if CPU(X86) || CPU(X86_64)
4051OPGEN_RETURN(true);
4052#endif
4053break;
4054break;
4055case Arg::Addr:
4056case Arg::Stack:
4057case Arg::CallArg:
4058#if CPU(X86) || CPU(X86_64)
4059OPGEN_RETURN(true);
4060#endif
4061break;
4062break;
4063case Arg::Index:
4064#if CPU(X86) || CPU(X86_64)
4065OPGEN_RETURN(true);
4066#endif
4067break;
4068break;
4069default:
4070break;
4071}
4072break;
4073default:
4074break;
4075}
4076break;
4077case Opcode::Not64:
4078switch (sizeof...(Arguments)) {
4079case 2:
4080switch (opgenHiddenPtrIdentity(kinds)[0]) {
4081case Arg::Tmp:
4082switch (opgenHiddenPtrIdentity(kinds)[1]) {
4083case Arg::Tmp:
4084#if CPU(ARM64)
4085OPGEN_RETURN(true);
4086#endif
4087break;
4088break;
4089default:
4090break;
4091}
4092break;
4093default:
4094break;
4095}
4096break;
4097case 1:
4098switch (opgenHiddenPtrIdentity(kinds)[0]) {
4099case Arg::Tmp:
4100#if CPU(X86_64)
4101OPGEN_RETURN(true);
4102#endif
4103break;
4104break;
4105case Arg::Addr:
4106case Arg::Stack:
4107case Arg::CallArg:
4108#if CPU(X86_64)
4109OPGEN_RETURN(true);
4110#endif
4111break;
4112break;
4113case Arg::Index:
4114#if CPU(X86_64)
4115OPGEN_RETURN(true);
4116#endif
4117break;
4118break;
4119default:
4120break;
4121}
4122break;
4123default:
4124break;
4125}
4126break;
4127case Opcode::AbsDouble:
4128switch (sizeof...(Arguments)) {
4129case 2:
4130switch (opgenHiddenPtrIdentity(kinds)[0]) {
4131case Arg::Tmp:
4132switch (opgenHiddenPtrIdentity(kinds)[1]) {
4133case Arg::Tmp:
4134#if CPU(ARM64)
4135OPGEN_RETURN(true);
4136#endif
4137break;
4138break;
4139default:
4140break;
4141}
4142break;
4143default:
4144break;
4145}
4146break;
4147default:
4148break;
4149}
4150break;
4151case Opcode::AbsFloat:
4152switch (sizeof...(Arguments)) {
4153case 2:
4154switch (opgenHiddenPtrIdentity(kinds)[0]) {
4155case Arg::Tmp:
4156switch (opgenHiddenPtrIdentity(kinds)[1]) {
4157case Arg::Tmp:
4158#if CPU(ARM64)
4159OPGEN_RETURN(true);
4160#endif
4161break;
4162break;
4163default:
4164break;
4165}
4166break;
4167default:
4168break;
4169}
4170break;
4171default:
4172break;
4173}
4174break;
4175case Opcode::CeilDouble:
4176switch (sizeof...(Arguments)) {
4177case 2:
4178switch (opgenHiddenPtrIdentity(kinds)[0]) {
4179case Arg::Tmp:
4180switch (opgenHiddenPtrIdentity(kinds)[1]) {
4181case Arg::Tmp:
4182OPGEN_RETURN(true);
4183break;
4184break;
4185default:
4186break;
4187}
4188break;
4189case Arg::Addr:
4190case Arg::Stack:
4191case Arg::CallArg:
4192switch (opgenHiddenPtrIdentity(kinds)[1]) {
4193case Arg::Tmp:
4194#if CPU(X86) || CPU(X86_64)
4195OPGEN_RETURN(true);
4196#endif
4197break;
4198break;
4199default:
4200break;
4201}
4202break;
4203default:
4204break;
4205}
4206break;
4207default:
4208break;
4209}
4210break;
4211case Opcode::CeilFloat:
4212switch (sizeof...(Arguments)) {
4213case 2:
4214switch (opgenHiddenPtrIdentity(kinds)[0]) {
4215case Arg::Tmp:
4216switch (opgenHiddenPtrIdentity(kinds)[1]) {
4217case Arg::Tmp:
4218OPGEN_RETURN(true);
4219break;
4220break;
4221default:
4222break;
4223}
4224break;
4225case Arg::Addr:
4226case Arg::Stack:
4227case Arg::CallArg:
4228switch (opgenHiddenPtrIdentity(kinds)[1]) {
4229case Arg::Tmp:
4230#if CPU(X86) || CPU(X86_64)
4231OPGEN_RETURN(true);
4232#endif
4233break;
4234break;
4235default:
4236break;
4237}
4238break;
4239default:
4240break;
4241}
4242break;
4243default:
4244break;
4245}
4246break;
4247case Opcode::FloorDouble:
4248switch (sizeof...(Arguments)) {
4249case 2:
4250switch (opgenHiddenPtrIdentity(kinds)[0]) {
4251case Arg::Tmp:
4252switch (opgenHiddenPtrIdentity(kinds)[1]) {
4253case Arg::Tmp:
4254OPGEN_RETURN(true);
4255break;
4256break;
4257default:
4258break;
4259}
4260break;
4261case Arg::Addr:
4262case Arg::Stack:
4263case Arg::CallArg:
4264switch (opgenHiddenPtrIdentity(kinds)[1]) {
4265case Arg::Tmp:
4266#if CPU(X86) || CPU(X86_64)
4267OPGEN_RETURN(true);
4268#endif
4269break;
4270break;
4271default:
4272break;
4273}
4274break;
4275default:
4276break;
4277}
4278break;
4279default:
4280break;
4281}
4282break;
4283case Opcode::FloorFloat:
4284switch (sizeof...(Arguments)) {
4285case 2:
4286switch (opgenHiddenPtrIdentity(kinds)[0]) {
4287case Arg::Tmp:
4288switch (opgenHiddenPtrIdentity(kinds)[1]) {
4289case Arg::Tmp:
4290OPGEN_RETURN(true);
4291break;
4292break;
4293default:
4294break;
4295}
4296break;
4297case Arg::Addr:
4298case Arg::Stack:
4299case Arg::CallArg:
4300switch (opgenHiddenPtrIdentity(kinds)[1]) {
4301case Arg::Tmp:
4302#if CPU(X86) || CPU(X86_64)
4303OPGEN_RETURN(true);
4304#endif
4305break;
4306break;
4307default:
4308break;
4309}
4310break;
4311default:
4312break;
4313}
4314break;
4315default:
4316break;
4317}
4318break;
4319case Opcode::SqrtDouble:
4320switch (sizeof...(Arguments)) {
4321case 2:
4322switch (opgenHiddenPtrIdentity(kinds)[0]) {
4323case Arg::Tmp:
4324switch (opgenHiddenPtrIdentity(kinds)[1]) {
4325case Arg::Tmp:
4326OPGEN_RETURN(true);
4327break;
4328break;
4329default:
4330break;
4331}
4332break;
4333case Arg::Addr:
4334case Arg::Stack:
4335case Arg::CallArg:
4336switch (opgenHiddenPtrIdentity(kinds)[1]) {
4337case Arg::Tmp:
4338#if CPU(X86) || CPU(X86_64)
4339OPGEN_RETURN(true);
4340#endif
4341break;
4342break;
4343default:
4344break;
4345}
4346break;
4347default:
4348break;
4349}
4350break;
4351default:
4352break;
4353}
4354break;
4355case Opcode::SqrtFloat:
4356switch (sizeof...(Arguments)) {
4357case 2:
4358switch (opgenHiddenPtrIdentity(kinds)[0]) {
4359case Arg::Tmp:
4360switch (opgenHiddenPtrIdentity(kinds)[1]) {
4361case Arg::Tmp:
4362OPGEN_RETURN(true);
4363break;
4364break;
4365default:
4366break;
4367}
4368break;
4369case Arg::Addr:
4370case Arg::Stack:
4371case Arg::CallArg:
4372switch (opgenHiddenPtrIdentity(kinds)[1]) {
4373case Arg::Tmp:
4374#if CPU(X86) || CPU(X86_64)
4375OPGEN_RETURN(true);
4376#endif
4377break;
4378break;
4379default:
4380break;
4381}
4382break;
4383default:
4384break;
4385}
4386break;
4387default:
4388break;
4389}
4390break;
4391case Opcode::ConvertInt32ToDouble:
4392switch (sizeof...(Arguments)) {
4393case 2:
4394switch (opgenHiddenPtrIdentity(kinds)[0]) {
4395case Arg::Tmp:
4396switch (opgenHiddenPtrIdentity(kinds)[1]) {
4397case Arg::Tmp:
4398OPGEN_RETURN(true);
4399break;
4400break;
4401default:
4402break;
4403}
4404break;
4405case Arg::Addr:
4406case Arg::Stack:
4407case Arg::CallArg:
4408switch (opgenHiddenPtrIdentity(kinds)[1]) {
4409case Arg::Tmp:
4410#if CPU(X86) || CPU(X86_64)
4411OPGEN_RETURN(true);
4412#endif
4413break;
4414break;
4415default:
4416break;
4417}
4418break;
4419default:
4420break;
4421}
4422break;
4423default:
4424break;
4425}
4426break;
4427case Opcode::ConvertInt64ToDouble:
4428switch (sizeof...(Arguments)) {
4429case 2:
4430switch (opgenHiddenPtrIdentity(kinds)[0]) {
4431case Arg::Tmp:
4432switch (opgenHiddenPtrIdentity(kinds)[1]) {
4433case Arg::Tmp:
4434#if CPU(X86_64) || CPU(ARM64)
4435OPGEN_RETURN(true);
4436#endif
4437break;
4438break;
4439default:
4440break;
4441}
4442break;
4443case Arg::Addr:
4444case Arg::Stack:
4445case Arg::CallArg:
4446switch (opgenHiddenPtrIdentity(kinds)[1]) {
4447case Arg::Tmp:
4448#if CPU(X86_64)
4449OPGEN_RETURN(true);
4450#endif
4451break;
4452break;
4453default:
4454break;
4455}
4456break;
4457default:
4458break;
4459}
4460break;
4461default:
4462break;
4463}
4464break;
4465case Opcode::ConvertInt32ToFloat:
4466switch (sizeof...(Arguments)) {
4467case 2:
4468switch (opgenHiddenPtrIdentity(kinds)[0]) {
4469case Arg::Tmp:
4470switch (opgenHiddenPtrIdentity(kinds)[1]) {
4471case Arg::Tmp:
4472OPGEN_RETURN(true);
4473break;
4474break;
4475default:
4476break;
4477}
4478break;
4479case Arg::Addr:
4480case Arg::Stack:
4481case Arg::CallArg:
4482switch (opgenHiddenPtrIdentity(kinds)[1]) {
4483case Arg::Tmp:
4484#if CPU(X86) || CPU(X86_64)
4485OPGEN_RETURN(true);
4486#endif
4487break;
4488break;
4489default:
4490break;
4491}
4492break;
4493default:
4494break;
4495}
4496break;
4497default:
4498break;
4499}
4500break;
4501case Opcode::ConvertInt64ToFloat:
4502switch (sizeof...(Arguments)) {
4503case 2:
4504switch (opgenHiddenPtrIdentity(kinds)[0]) {
4505case Arg::Tmp:
4506switch (opgenHiddenPtrIdentity(kinds)[1]) {
4507case Arg::Tmp:
4508#if CPU(X86_64) || CPU(ARM64)
4509OPGEN_RETURN(true);
4510#endif
4511break;
4512break;
4513default:
4514break;
4515}
4516break;
4517case Arg::Addr:
4518case Arg::Stack:
4519case Arg::CallArg:
4520switch (opgenHiddenPtrIdentity(kinds)[1]) {
4521case Arg::Tmp:
4522#if CPU(X86_64)
4523OPGEN_RETURN(true);
4524#endif
4525break;
4526break;
4527default:
4528break;
4529}
4530break;
4531default:
4532break;
4533}
4534break;
4535default:
4536break;
4537}
4538break;
4539case Opcode::CountLeadingZeros32:
4540switch (sizeof...(Arguments)) {
4541case 2:
4542switch (opgenHiddenPtrIdentity(kinds)[0]) {
4543case Arg::Tmp:
4544switch (opgenHiddenPtrIdentity(kinds)[1]) {
4545case Arg::Tmp:
4546OPGEN_RETURN(true);
4547break;
4548break;
4549default:
4550break;
4551}
4552break;
4553case Arg::Addr:
4554case Arg::Stack:
4555case Arg::CallArg:
4556switch (opgenHiddenPtrIdentity(kinds)[1]) {
4557case Arg::Tmp:
4558#if CPU(X86) || CPU(X86_64)
4559OPGEN_RETURN(true);
4560#endif
4561break;
4562break;
4563default:
4564break;
4565}
4566break;
4567default:
4568break;
4569}
4570break;
4571default:
4572break;
4573}
4574break;
4575case Opcode::CountLeadingZeros64:
4576switch (sizeof...(Arguments)) {
4577case 2:
4578switch (opgenHiddenPtrIdentity(kinds)[0]) {
4579case Arg::Tmp:
4580switch (opgenHiddenPtrIdentity(kinds)[1]) {
4581case Arg::Tmp:
4582#if CPU(X86_64) || CPU(ARM64)
4583OPGEN_RETURN(true);
4584#endif
4585break;
4586break;
4587default:
4588break;
4589}
4590break;
4591case Arg::Addr:
4592case Arg::Stack:
4593case Arg::CallArg:
4594switch (opgenHiddenPtrIdentity(kinds)[1]) {
4595case Arg::Tmp:
4596#if CPU(X86_64)
4597OPGEN_RETURN(true);
4598#endif
4599break;
4600break;
4601default:
4602break;
4603}
4604break;
4605default:
4606break;
4607}
4608break;
4609default:
4610break;
4611}
4612break;
4613case Opcode::ConvertDoubleToFloat:
4614switch (sizeof...(Arguments)) {
4615case 2:
4616switch (opgenHiddenPtrIdentity(kinds)[0]) {
4617case Arg::Tmp:
4618switch (opgenHiddenPtrIdentity(kinds)[1]) {
4619case Arg::Tmp:
4620OPGEN_RETURN(true);
4621break;
4622break;
4623default:
4624break;
4625}
4626break;
4627case Arg::Addr:
4628case Arg::Stack:
4629case Arg::CallArg:
4630switch (opgenHiddenPtrIdentity(kinds)[1]) {
4631case Arg::Tmp:
4632#if CPU(X86) || CPU(X86_64)
4633OPGEN_RETURN(true);
4634#endif
4635break;
4636break;
4637default:
4638break;
4639}
4640break;
4641default:
4642break;
4643}
4644break;
4645default:
4646break;
4647}
4648break;
4649case Opcode::ConvertFloatToDouble:
4650switch (sizeof...(Arguments)) {
4651case 2:
4652switch (opgenHiddenPtrIdentity(kinds)[0]) {
4653case Arg::Tmp:
4654switch (opgenHiddenPtrIdentity(kinds)[1]) {
4655case Arg::Tmp:
4656OPGEN_RETURN(true);
4657break;
4658break;
4659default:
4660break;
4661}
4662break;
4663case Arg::Addr:
4664case Arg::Stack:
4665case Arg::CallArg:
4666switch (opgenHiddenPtrIdentity(kinds)[1]) {
4667case Arg::Tmp:
4668#if CPU(X86) || CPU(X86_64)
4669OPGEN_RETURN(true);
4670#endif
4671break;
4672break;
4673default:
4674break;
4675}
4676break;
4677default:
4678break;
4679}
4680break;
4681default:
4682break;
4683}
4684break;
4685case Opcode::Move:
4686switch (sizeof...(Arguments)) {
4687case 2:
4688switch (opgenHiddenPtrIdentity(kinds)[0]) {
4689case Arg::Tmp:
4690switch (opgenHiddenPtrIdentity(kinds)[1]) {
4691case Arg::Tmp:
4692OPGEN_RETURN(true);
4693break;
4694break;
4695case Arg::Addr:
4696case Arg::Stack:
4697case Arg::CallArg:
4698OPGEN_RETURN(true);
4699break;
4700break;
4701case Arg::Index:
4702OPGEN_RETURN(true);
4703break;
4704break;
4705default:
4706break;
4707}
4708break;
4709case Arg::Imm:
4710switch (opgenHiddenPtrIdentity(kinds)[1]) {
4711case Arg::Tmp:
4712OPGEN_RETURN(true);
4713break;
4714break;
4715case Arg::Addr:
4716case Arg::Stack:
4717case Arg::CallArg:
4718#if CPU(X86) || CPU(X86_64)
4719OPGEN_RETURN(true);
4720#endif
4721break;
4722break;
4723default:
4724break;
4725}
4726break;
4727#if USE(JSVALUE64)
4728case Arg::BigImm:
4729switch (opgenHiddenPtrIdentity(kinds)[1]) {
4730case Arg::Tmp:
4731OPGEN_RETURN(true);
4732break;
4733break;
4734default:
4735break;
4736}
4737break;
4738#endif // USE(JSVALUE64)
4739case Arg::Addr:
4740case Arg::Stack:
4741case Arg::CallArg:
4742switch (opgenHiddenPtrIdentity(kinds)[1]) {
4743case Arg::Tmp:
4744OPGEN_RETURN(true);
4745break;
4746break;
4747default:
4748break;
4749}
4750break;
4751case Arg::Index:
4752switch (opgenHiddenPtrIdentity(kinds)[1]) {
4753case Arg::Tmp:
4754OPGEN_RETURN(true);
4755break;
4756break;
4757default:
4758break;
4759}
4760break;
4761default:
4762break;
4763}
4764break;
4765case 3:
4766switch (opgenHiddenPtrIdentity(kinds)[0]) {
4767case Arg::Addr:
4768case Arg::Stack:
4769case Arg::CallArg:
4770switch (opgenHiddenPtrIdentity(kinds)[1]) {
4771case Arg::Addr:
4772case Arg::Stack:
4773case Arg::CallArg:
4774switch (opgenHiddenPtrIdentity(kinds)[2]) {
4775case Arg::Tmp:
4776OPGEN_RETURN(true);
4777break;
4778break;
4779default:
4780break;
4781}
4782break;
4783default:
4784break;
4785}
4786break;
4787default:
4788break;
4789}
4790break;
4791default:
4792break;
4793}
4794break;
4795case Opcode::Swap32:
4796switch (sizeof...(Arguments)) {
4797case 2:
4798switch (opgenHiddenPtrIdentity(kinds)[0]) {
4799case Arg::Tmp:
4800switch (opgenHiddenPtrIdentity(kinds)[1]) {
4801case Arg::Tmp:
4802#if CPU(X86) || CPU(X86_64)
4803OPGEN_RETURN(true);
4804#endif
4805break;
4806break;
4807case Arg::Addr:
4808case Arg::Stack:
4809case Arg::CallArg:
4810#if CPU(X86) || CPU(X86_64)
4811OPGEN_RETURN(true);
4812#endif
4813break;
4814break;
4815default:
4816break;
4817}
4818break;
4819default:
4820break;
4821}
4822break;
4823default:
4824break;
4825}
4826break;
4827case Opcode::Swap64:
4828switch (sizeof...(Arguments)) {
4829case 2:
4830switch (opgenHiddenPtrIdentity(kinds)[0]) {
4831case Arg::Tmp:
4832switch (opgenHiddenPtrIdentity(kinds)[1]) {
4833case Arg::Tmp:
4834#if CPU(X86_64)
4835OPGEN_RETURN(true);
4836#endif
4837break;
4838break;
4839case Arg::Addr:
4840case Arg::Stack:
4841case Arg::CallArg:
4842#if CPU(X86_64)
4843OPGEN_RETURN(true);
4844#endif
4845break;
4846break;
4847default:
4848break;
4849}
4850break;
4851default:
4852break;
4853}
4854break;
4855default:
4856break;
4857}
4858break;
4859case Opcode::Move32:
4860switch (sizeof...(Arguments)) {
4861case 2:
4862switch (opgenHiddenPtrIdentity(kinds)[0]) {
4863case Arg::Tmp:
4864switch (opgenHiddenPtrIdentity(kinds)[1]) {
4865case Arg::Tmp:
4866OPGEN_RETURN(true);
4867break;
4868break;
4869case Arg::Addr:
4870case Arg::Stack:
4871case Arg::CallArg:
4872OPGEN_RETURN(true);
4873break;
4874break;
4875case Arg::Index:
4876OPGEN_RETURN(true);
4877break;
4878break;
4879default:
4880break;
4881}
4882break;
4883case Arg::Addr:
4884case Arg::Stack:
4885case Arg::CallArg:
4886switch (opgenHiddenPtrIdentity(kinds)[1]) {
4887case Arg::Tmp:
4888OPGEN_RETURN(true);
4889break;
4890break;
4891default:
4892break;
4893}
4894break;
4895case Arg::Index:
4896switch (opgenHiddenPtrIdentity(kinds)[1]) {
4897case Arg::Tmp:
4898OPGEN_RETURN(true);
4899break;
4900break;
4901default:
4902break;
4903}
4904break;
4905case Arg::Imm:
4906switch (opgenHiddenPtrIdentity(kinds)[1]) {
4907case Arg::Tmp:
4908#if CPU(X86) || CPU(X86_64)
4909OPGEN_RETURN(true);
4910#endif
4911break;
4912break;
4913case Arg::Addr:
4914case Arg::Stack:
4915case Arg::CallArg:
4916#if CPU(X86) || CPU(X86_64)
4917OPGEN_RETURN(true);
4918#endif
4919break;
4920break;
4921case Arg::Index:
4922#if CPU(X86) || CPU(X86_64)
4923OPGEN_RETURN(true);
4924#endif
4925break;
4926break;
4927default:
4928break;
4929}
4930break;
4931default:
4932break;
4933}
4934break;
4935case 3:
4936switch (opgenHiddenPtrIdentity(kinds)[0]) {
4937case Arg::Addr:
4938case Arg::Stack:
4939case Arg::CallArg:
4940switch (opgenHiddenPtrIdentity(kinds)[1]) {
4941case Arg::Addr:
4942case Arg::Stack:
4943case Arg::CallArg:
4944switch (opgenHiddenPtrIdentity(kinds)[2]) {
4945case Arg::Tmp:
4946OPGEN_RETURN(true);
4947break;
4948break;
4949default:
4950break;
4951}
4952break;
4953default:
4954break;
4955}
4956break;
4957default:
4958break;
4959}
4960break;
4961default:
4962break;
4963}
4964break;
4965case Opcode::StoreZero32:
4966switch (sizeof...(Arguments)) {
4967case 1:
4968switch (opgenHiddenPtrIdentity(kinds)[0]) {
4969case Arg::Addr:
4970case Arg::Stack:
4971case Arg::CallArg:
4972OPGEN_RETURN(true);
4973break;
4974break;
4975case Arg::Index:
4976OPGEN_RETURN(true);
4977break;
4978break;
4979default:
4980break;
4981}
4982break;
4983default:
4984break;
4985}
4986break;
4987case Opcode::StoreZero64:
4988switch (sizeof...(Arguments)) {
4989case 1:
4990switch (opgenHiddenPtrIdentity(kinds)[0]) {
4991case Arg::Addr:
4992case Arg::Stack:
4993case Arg::CallArg:
4994#if CPU(X86_64) || CPU(ARM64)
4995OPGEN_RETURN(true);
4996#endif
4997break;
4998break;
4999case Arg::Index:
5000#if CPU(X86_64) || CPU(ARM64)
5001OPGEN_RETURN(true);
5002#endif
5003break;
5004break;
5005default:
5006break;
5007}
5008break;
5009default:
5010break;
5011}
5012break;
5013case Opcode::SignExtend32ToPtr:
5014switch (sizeof...(Arguments)) {
5015case 2:
5016switch (opgenHiddenPtrIdentity(kinds)[0]) {
5017case Arg::Tmp:
5018switch (opgenHiddenPtrIdentity(kinds)[1]) {
5019case Arg::Tmp:
5020OPGEN_RETURN(true);
5021break;
5022break;
5023default:
5024break;
5025}
5026break;
5027default:
5028break;
5029}
5030break;
5031default:
5032break;
5033}
5034break;
5035case Opcode::ZeroExtend8To32:
5036switch (sizeof...(Arguments)) {
5037case 2:
5038switch (opgenHiddenPtrIdentity(kinds)[0]) {
5039case Arg::Tmp:
5040switch (opgenHiddenPtrIdentity(kinds)[1]) {
5041case Arg::Tmp:
5042OPGEN_RETURN(true);
5043break;
5044break;
5045default:
5046break;
5047}
5048break;
5049case Arg::Addr:
5050case Arg::Stack:
5051case Arg::CallArg:
5052switch (opgenHiddenPtrIdentity(kinds)[1]) {
5053case Arg::Tmp:
5054#if CPU(X86) || CPU(X86_64)
5055OPGEN_RETURN(true);
5056#endif
5057break;
5058break;
5059default:
5060break;
5061}
5062break;
5063case Arg::Index:
5064switch (opgenHiddenPtrIdentity(kinds)[1]) {
5065case Arg::Tmp:
5066#if CPU(X86) || CPU(X86_64)
5067OPGEN_RETURN(true);
5068#endif
5069break;
5070break;
5071default:
5072break;
5073}
5074break;
5075default:
5076break;
5077}
5078break;
5079default:
5080break;
5081}
5082break;
5083case Opcode::SignExtend8To32:
5084switch (sizeof...(Arguments)) {
5085case 2:
5086switch (opgenHiddenPtrIdentity(kinds)[0]) {
5087case Arg::Tmp:
5088switch (opgenHiddenPtrIdentity(kinds)[1]) {
5089case Arg::Tmp:
5090OPGEN_RETURN(true);
5091break;
5092break;
5093default:
5094break;
5095}
5096break;
5097case Arg::Addr:
5098case Arg::Stack:
5099case Arg::CallArg:
5100switch (opgenHiddenPtrIdentity(kinds)[1]) {
5101case Arg::Tmp:
5102#if CPU(X86) || CPU(X86_64)
5103OPGEN_RETURN(true);
5104#endif
5105break;
5106break;
5107default:
5108break;
5109}
5110break;
5111case Arg::Index:
5112switch (opgenHiddenPtrIdentity(kinds)[1]) {
5113case Arg::Tmp:
5114#if CPU(X86) || CPU(X86_64)
5115OPGEN_RETURN(true);
5116#endif
5117break;
5118break;
5119default:
5120break;
5121}
5122break;
5123default:
5124break;
5125}
5126break;
5127default:
5128break;
5129}
5130break;
5131case Opcode::ZeroExtend16To32:
5132switch (sizeof...(Arguments)) {
5133case 2:
5134switch (opgenHiddenPtrIdentity(kinds)[0]) {
5135case Arg::Tmp:
5136switch (opgenHiddenPtrIdentity(kinds)[1]) {
5137case Arg::Tmp:
5138OPGEN_RETURN(true);
5139break;
5140break;
5141default:
5142break;
5143}
5144break;
5145case Arg::Addr:
5146case Arg::Stack:
5147case Arg::CallArg:
5148switch (opgenHiddenPtrIdentity(kinds)[1]) {
5149case Arg::Tmp:
5150#if CPU(X86) || CPU(X86_64)
5151OPGEN_RETURN(true);
5152#endif
5153break;
5154break;
5155default:
5156break;
5157}
5158break;
5159case Arg::Index:
5160switch (opgenHiddenPtrIdentity(kinds)[1]) {
5161case Arg::Tmp:
5162#if CPU(X86) || CPU(X86_64)
5163OPGEN_RETURN(true);
5164#endif
5165break;
5166break;
5167default:
5168break;
5169}
5170break;
5171default:
5172break;
5173}
5174break;
5175default:
5176break;
5177}
5178break;
5179case Opcode::SignExtend16To32:
5180switch (sizeof...(Arguments)) {
5181case 2:
5182switch (opgenHiddenPtrIdentity(kinds)[0]) {
5183case Arg::Tmp:
5184switch (opgenHiddenPtrIdentity(kinds)[1]) {
5185case Arg::Tmp:
5186OPGEN_RETURN(true);
5187break;
5188break;
5189default:
5190break;
5191}
5192break;
5193case Arg::Addr:
5194case Arg::Stack:
5195case Arg::CallArg:
5196switch (opgenHiddenPtrIdentity(kinds)[1]) {
5197case Arg::Tmp:
5198#if CPU(X86) || CPU(X86_64)
5199OPGEN_RETURN(true);
5200#endif
5201break;
5202break;
5203default:
5204break;
5205}
5206break;
5207case Arg::Index:
5208switch (opgenHiddenPtrIdentity(kinds)[1]) {
5209case Arg::Tmp:
5210#if CPU(X86) || CPU(X86_64)
5211OPGEN_RETURN(true);
5212#endif
5213break;
5214break;
5215default:
5216break;
5217}
5218break;
5219default:
5220break;
5221}
5222break;
5223default:
5224break;
5225}
5226break;
5227case Opcode::MoveFloat:
5228switch (sizeof...(Arguments)) {
5229case 2:
5230switch (opgenHiddenPtrIdentity(kinds)[0]) {
5231case Arg::Tmp:
5232switch (opgenHiddenPtrIdentity(kinds)[1]) {
5233case Arg::Tmp:
5234OPGEN_RETURN(true);
5235break;
5236break;
5237case Arg::Addr:
5238case Arg::Stack:
5239case Arg::CallArg:
5240OPGEN_RETURN(true);
5241break;
5242break;
5243case Arg::Index:
5244OPGEN_RETURN(true);
5245break;
5246break;
5247default:
5248break;
5249}
5250break;
5251case Arg::Addr:
5252case Arg::Stack:
5253case Arg::CallArg:
5254switch (opgenHiddenPtrIdentity(kinds)[1]) {
5255case Arg::Tmp:
5256OPGEN_RETURN(true);
5257break;
5258break;
5259default:
5260break;
5261}
5262break;
5263case Arg::Index:
5264switch (opgenHiddenPtrIdentity(kinds)[1]) {
5265case Arg::Tmp:
5266OPGEN_RETURN(true);
5267break;
5268break;
5269default:
5270break;
5271}
5272break;
5273default:
5274break;
5275}
5276break;
5277case 3:
5278switch (opgenHiddenPtrIdentity(kinds)[0]) {
5279case Arg::Addr:
5280case Arg::Stack:
5281case Arg::CallArg:
5282switch (opgenHiddenPtrIdentity(kinds)[1]) {
5283case Arg::Addr:
5284case Arg::Stack:
5285case Arg::CallArg:
5286switch (opgenHiddenPtrIdentity(kinds)[2]) {
5287case Arg::Tmp:
5288OPGEN_RETURN(true);
5289break;
5290break;
5291default:
5292break;
5293}
5294break;
5295default:
5296break;
5297}
5298break;
5299default:
5300break;
5301}
5302break;
5303default:
5304break;
5305}
5306break;
5307case Opcode::MoveDouble:
5308switch (sizeof...(Arguments)) {
5309case 2:
5310switch (opgenHiddenPtrIdentity(kinds)[0]) {
5311case Arg::Tmp:
5312switch (opgenHiddenPtrIdentity(kinds)[1]) {
5313case Arg::Tmp:
5314OPGEN_RETURN(true);
5315break;
5316break;
5317case Arg::Addr:
5318case Arg::Stack:
5319case Arg::CallArg:
5320OPGEN_RETURN(true);
5321break;
5322break;
5323case Arg::Index:
5324OPGEN_RETURN(true);
5325break;
5326break;
5327default:
5328break;
5329}
5330break;
5331case Arg::Addr:
5332case Arg::Stack:
5333case Arg::CallArg:
5334switch (opgenHiddenPtrIdentity(kinds)[1]) {
5335case Arg::Tmp:
5336OPGEN_RETURN(true);
5337break;
5338break;
5339default:
5340break;
5341}
5342break;
5343case Arg::Index:
5344switch (opgenHiddenPtrIdentity(kinds)[1]) {
5345case Arg::Tmp:
5346OPGEN_RETURN(true);
5347break;
5348break;
5349default:
5350break;
5351}
5352break;
5353default:
5354break;
5355}
5356break;
5357case 3:
5358switch (opgenHiddenPtrIdentity(kinds)[0]) {
5359case Arg::Addr:
5360case Arg::Stack:
5361case Arg::CallArg:
5362switch (opgenHiddenPtrIdentity(kinds)[1]) {
5363case Arg::Addr:
5364case Arg::Stack:
5365case Arg::CallArg:
5366switch (opgenHiddenPtrIdentity(kinds)[2]) {
5367case Arg::Tmp:
5368OPGEN_RETURN(true);
5369break;
5370break;
5371default:
5372break;
5373}
5374break;
5375default:
5376break;
5377}
5378break;
5379default:
5380break;
5381}
5382break;
5383default:
5384break;
5385}
5386break;
5387case Opcode::MoveZeroToDouble:
5388switch (sizeof...(Arguments)) {
5389case 1:
5390switch (opgenHiddenPtrIdentity(kinds)[0]) {
5391case Arg::Tmp:
5392OPGEN_RETURN(true);
5393break;
5394break;
5395default:
5396break;
5397}
5398break;
5399default:
5400break;
5401}
5402break;
5403case Opcode::Move64ToDouble:
5404switch (sizeof...(Arguments)) {
5405case 2:
5406switch (opgenHiddenPtrIdentity(kinds)[0]) {
5407case Arg::Tmp:
5408switch (opgenHiddenPtrIdentity(kinds)[1]) {
5409case Arg::Tmp:
5410#if CPU(X86_64) || CPU(ARM64)
5411OPGEN_RETURN(true);
5412#endif
5413break;
5414break;
5415default:
5416break;
5417}
5418break;
5419case Arg::Addr:
5420case Arg::Stack:
5421case Arg::CallArg:
5422switch (opgenHiddenPtrIdentity(kinds)[1]) {
5423case Arg::Tmp:
5424#if CPU(X86_64)
5425OPGEN_RETURN(true);
5426#endif
5427break;
5428break;
5429default:
5430break;
5431}
5432break;
5433case Arg::Index:
5434switch (opgenHiddenPtrIdentity(kinds)[1]) {
5435case Arg::Tmp:
5436#if CPU(X86_64) || CPU(ARM64)
5437OPGEN_RETURN(true);
5438#endif
5439break;
5440break;
5441default:
5442break;
5443}
5444break;
5445default:
5446break;
5447}
5448break;
5449default:
5450break;
5451}
5452break;
5453case Opcode::Move32ToFloat:
5454switch (sizeof...(Arguments)) {
5455case 2:
5456switch (opgenHiddenPtrIdentity(kinds)[0]) {
5457case Arg::Tmp:
5458switch (opgenHiddenPtrIdentity(kinds)[1]) {
5459case Arg::Tmp:
5460OPGEN_RETURN(true);
5461break;
5462break;
5463default:
5464break;
5465}
5466break;
5467case Arg::Addr:
5468case Arg::Stack:
5469case Arg::CallArg:
5470switch (opgenHiddenPtrIdentity(kinds)[1]) {
5471case Arg::Tmp:
5472#if CPU(X86) || CPU(X86_64)
5473OPGEN_RETURN(true);
5474#endif
5475break;
5476break;
5477default:
5478break;
5479}
5480break;
5481case Arg::Index:
5482switch (opgenHiddenPtrIdentity(kinds)[1]) {
5483case Arg::Tmp:
5484OPGEN_RETURN(true);
5485break;
5486break;
5487default:
5488break;
5489}
5490break;
5491default:
5492break;
5493}
5494break;
5495default:
5496break;
5497}
5498break;
5499case Opcode::MoveDoubleTo64:
5500switch (sizeof...(Arguments)) {
5501case 2:
5502switch (opgenHiddenPtrIdentity(kinds)[0]) {
5503case Arg::Tmp:
5504switch (opgenHiddenPtrIdentity(kinds)[1]) {
5505case Arg::Tmp:
5506#if CPU(X86_64) || CPU(ARM64)
5507OPGEN_RETURN(true);
5508#endif
5509break;
5510break;
5511default:
5512break;
5513}
5514break;
5515case Arg::Addr:
5516case Arg::Stack:
5517case Arg::CallArg:
5518switch (opgenHiddenPtrIdentity(kinds)[1]) {
5519case Arg::Tmp:
5520#if CPU(X86_64) || CPU(ARM64)
5521OPGEN_RETURN(true);
5522#endif
5523break;
5524break;
5525default:
5526break;
5527}
5528break;
5529case Arg::Index:
5530switch (opgenHiddenPtrIdentity(kinds)[1]) {
5531case Arg::Tmp:
5532#if CPU(X86_64) || CPU(ARM64)
5533OPGEN_RETURN(true);
5534#endif
5535break;
5536break;
5537default:
5538break;
5539}
5540break;
5541default:
5542break;
5543}
5544break;
5545default:
5546break;
5547}
5548break;
5549case Opcode::MoveFloatTo32:
5550switch (sizeof...(Arguments)) {
5551case 2:
5552switch (opgenHiddenPtrIdentity(kinds)[0]) {
5553case Arg::Tmp:
5554switch (opgenHiddenPtrIdentity(kinds)[1]) {
5555case Arg::Tmp:
5556OPGEN_RETURN(true);
5557break;
5558break;
5559default:
5560break;
5561}
5562break;
5563case Arg::Addr:
5564case Arg::Stack:
5565case Arg::CallArg:
5566switch (opgenHiddenPtrIdentity(kinds)[1]) {
5567case Arg::Tmp:
5568OPGEN_RETURN(true);
5569break;
5570break;
5571default:
5572break;
5573}
5574break;
5575case Arg::Index:
5576switch (opgenHiddenPtrIdentity(kinds)[1]) {
5577case Arg::Tmp:
5578OPGEN_RETURN(true);
5579break;
5580break;
5581default:
5582break;
5583}
5584break;
5585default:
5586break;
5587}
5588break;
5589default:
5590break;
5591}
5592break;
5593case Opcode::Load8:
5594switch (sizeof...(Arguments)) {
5595case 2:
5596switch (opgenHiddenPtrIdentity(kinds)[0]) {
5597case Arg::Addr:
5598case Arg::Stack:
5599case Arg::CallArg:
5600switch (opgenHiddenPtrIdentity(kinds)[1]) {
5601case Arg::Tmp:
5602OPGEN_RETURN(true);
5603break;
5604break;
5605default:
5606break;
5607}
5608break;
5609case Arg::Index:
5610switch (opgenHiddenPtrIdentity(kinds)[1]) {
5611case Arg::Tmp:
5612OPGEN_RETURN(true);
5613break;
5614break;
5615default:
5616break;
5617}
5618break;
5619default:
5620break;
5621}
5622break;
5623default:
5624break;
5625}
5626break;
5627case Opcode::LoadAcq8:
5628switch (sizeof...(Arguments)) {
5629case 2:
5630switch (opgenHiddenPtrIdentity(kinds)[0]) {
5631case Arg::SimpleAddr:
5632switch (opgenHiddenPtrIdentity(kinds)[1]) {
5633case Arg::Tmp:
5634#if CPU(ARMv7) || CPU(ARM64)
5635OPGEN_RETURN(true);
5636#endif
5637break;
5638break;
5639default:
5640break;
5641}
5642break;
5643default:
5644break;
5645}
5646break;
5647default:
5648break;
5649}
5650break;
5651case Opcode::Store8:
5652switch (sizeof...(Arguments)) {
5653case 2:
5654switch (opgenHiddenPtrIdentity(kinds)[0]) {
5655case Arg::Tmp:
5656switch (opgenHiddenPtrIdentity(kinds)[1]) {
5657case Arg::Index:
5658OPGEN_RETURN(true);
5659break;
5660break;
5661case Arg::Addr:
5662case Arg::Stack:
5663case Arg::CallArg:
5664OPGEN_RETURN(true);
5665break;
5666break;
5667default:
5668break;
5669}
5670break;
5671case Arg::Imm:
5672switch (opgenHiddenPtrIdentity(kinds)[1]) {
5673case Arg::Index:
5674#if CPU(X86) || CPU(X86_64)
5675OPGEN_RETURN(true);
5676#endif
5677break;
5678break;
5679case Arg::Addr:
5680case Arg::Stack:
5681case Arg::CallArg:
5682#if CPU(X86) || CPU(X86_64)
5683OPGEN_RETURN(true);
5684#endif
5685break;
5686break;
5687default:
5688break;
5689}
5690break;
5691default:
5692break;
5693}
5694break;
5695default:
5696break;
5697}
5698break;
5699case Opcode::StoreRel8:
5700switch (sizeof...(Arguments)) {
5701case 2:
5702switch (opgenHiddenPtrIdentity(kinds)[0]) {
5703case Arg::Tmp:
5704switch (opgenHiddenPtrIdentity(kinds)[1]) {
5705case Arg::SimpleAddr:
5706#if CPU(ARMv7) || CPU(ARM64)
5707OPGEN_RETURN(true);
5708#endif
5709break;
5710break;
5711default:
5712break;
5713}
5714break;
5715default:
5716break;
5717}
5718break;
5719default:
5720break;
5721}
5722break;
5723case Opcode::Load8SignedExtendTo32:
5724switch (sizeof...(Arguments)) {
5725case 2:
5726switch (opgenHiddenPtrIdentity(kinds)[0]) {
5727case Arg::Addr:
5728case Arg::Stack:
5729case Arg::CallArg:
5730switch (opgenHiddenPtrIdentity(kinds)[1]) {
5731case Arg::Tmp:
5732OPGEN_RETURN(true);
5733break;
5734break;
5735default:
5736break;
5737}
5738break;
5739case Arg::Index:
5740switch (opgenHiddenPtrIdentity(kinds)[1]) {
5741case Arg::Tmp:
5742OPGEN_RETURN(true);
5743break;
5744break;
5745default:
5746break;
5747}
5748break;
5749default:
5750break;
5751}
5752break;
5753default:
5754break;
5755}
5756break;
5757case Opcode::LoadAcq8SignedExtendTo32:
5758switch (sizeof...(Arguments)) {
5759case 2:
5760switch (opgenHiddenPtrIdentity(kinds)[0]) {
5761case Arg::SimpleAddr:
5762switch (opgenHiddenPtrIdentity(kinds)[1]) {
5763case Arg::Tmp:
5764#if CPU(ARMv7) || CPU(ARM64)
5765OPGEN_RETURN(true);
5766#endif
5767break;
5768break;
5769default:
5770break;
5771}
5772break;
5773default:
5774break;
5775}
5776break;
5777default:
5778break;
5779}
5780break;
5781case Opcode::Load16:
5782switch (sizeof...(Arguments)) {
5783case 2:
5784switch (opgenHiddenPtrIdentity(kinds)[0]) {
5785case Arg::Addr:
5786case Arg::Stack:
5787case Arg::CallArg:
5788switch (opgenHiddenPtrIdentity(kinds)[1]) {
5789case Arg::Tmp:
5790OPGEN_RETURN(true);
5791break;
5792break;
5793default:
5794break;
5795}
5796break;
5797case Arg::Index:
5798switch (opgenHiddenPtrIdentity(kinds)[1]) {
5799case Arg::Tmp:
5800OPGEN_RETURN(true);
5801break;
5802break;
5803default:
5804break;
5805}
5806break;
5807default:
5808break;
5809}
5810break;
5811default:
5812break;
5813}
5814break;
5815case Opcode::LoadAcq16:
5816switch (sizeof...(Arguments)) {
5817case 2:
5818switch (opgenHiddenPtrIdentity(kinds)[0]) {
5819case Arg::SimpleAddr:
5820switch (opgenHiddenPtrIdentity(kinds)[1]) {
5821case Arg::Tmp:
5822#if CPU(ARMv7) || CPU(ARM64)
5823OPGEN_RETURN(true);
5824#endif
5825break;
5826break;
5827default:
5828break;
5829}
5830break;
5831default:
5832break;
5833}
5834break;
5835default:
5836break;
5837}
5838break;
5839case Opcode::Load16SignedExtendTo32:
5840switch (sizeof...(Arguments)) {
5841case 2:
5842switch (opgenHiddenPtrIdentity(kinds)[0]) {
5843case Arg::Addr:
5844case Arg::Stack:
5845case Arg::CallArg:
5846switch (opgenHiddenPtrIdentity(kinds)[1]) {
5847case Arg::Tmp:
5848OPGEN_RETURN(true);
5849break;
5850break;
5851default:
5852break;
5853}
5854break;
5855case Arg::Index:
5856switch (opgenHiddenPtrIdentity(kinds)[1]) {
5857case Arg::Tmp:
5858OPGEN_RETURN(true);
5859break;
5860break;
5861default:
5862break;
5863}
5864break;
5865default:
5866break;
5867}
5868break;
5869default:
5870break;
5871}
5872break;
5873case Opcode::LoadAcq16SignedExtendTo32:
5874switch (sizeof...(Arguments)) {
5875case 2:
5876switch (opgenHiddenPtrIdentity(kinds)[0]) {
5877case Arg::SimpleAddr:
5878switch (opgenHiddenPtrIdentity(kinds)[1]) {
5879case Arg::Tmp:
5880#if CPU(ARMv7) || CPU(ARM64)
5881OPGEN_RETURN(true);
5882#endif
5883break;
5884break;
5885default:
5886break;
5887}
5888break;
5889default:
5890break;
5891}
5892break;
5893default:
5894break;
5895}
5896break;
5897case Opcode::Store16:
5898switch (sizeof...(Arguments)) {
5899case 2:
5900switch (opgenHiddenPtrIdentity(kinds)[0]) {
5901case Arg::Tmp:
5902switch (opgenHiddenPtrIdentity(kinds)[1]) {
5903case Arg::Index:
5904OPGEN_RETURN(true);
5905break;
5906break;
5907case Arg::Addr:
5908case Arg::Stack:
5909case Arg::CallArg:
5910OPGEN_RETURN(true);
5911break;
5912break;
5913default:
5914break;
5915}
5916break;
5917case Arg::Imm:
5918switch (opgenHiddenPtrIdentity(kinds)[1]) {
5919case Arg::Index:
5920#if CPU(X86) || CPU(X86_64)
5921OPGEN_RETURN(true);
5922#endif
5923break;
5924break;
5925case Arg::Addr:
5926case Arg::Stack:
5927case Arg::CallArg:
5928#if CPU(X86) || CPU(X86_64)
5929OPGEN_RETURN(true);
5930#endif
5931break;
5932break;
5933default:
5934break;
5935}
5936break;
5937default:
5938break;
5939}
5940break;
5941default:
5942break;
5943}
5944break;
5945case Opcode::StoreRel16:
5946switch (sizeof...(Arguments)) {
5947case 2:
5948switch (opgenHiddenPtrIdentity(kinds)[0]) {
5949case Arg::Tmp:
5950switch (opgenHiddenPtrIdentity(kinds)[1]) {
5951case Arg::SimpleAddr:
5952#if CPU(ARMv7) || CPU(ARM64)
5953OPGEN_RETURN(true);
5954#endif
5955break;
5956break;
5957default:
5958break;
5959}
5960break;
5961default:
5962break;
5963}
5964break;
5965default:
5966break;
5967}
5968break;
5969case Opcode::LoadAcq32:
5970switch (sizeof...(Arguments)) {
5971case 2:
5972switch (opgenHiddenPtrIdentity(kinds)[0]) {
5973case Arg::SimpleAddr:
5974switch (opgenHiddenPtrIdentity(kinds)[1]) {
5975case Arg::Tmp:
5976#if CPU(ARMv7) || CPU(ARM64)
5977OPGEN_RETURN(true);
5978#endif
5979break;
5980break;
5981default:
5982break;
5983}
5984break;
5985default:
5986break;
5987}
5988break;
5989default:
5990break;
5991}
5992break;
5993case Opcode::StoreRel32:
5994switch (sizeof...(Arguments)) {
5995case 2:
5996switch (opgenHiddenPtrIdentity(kinds)[0]) {
5997case Arg::Tmp:
5998switch (opgenHiddenPtrIdentity(kinds)[1]) {
5999case Arg::SimpleAddr:
6000#if CPU(ARMv7) || CPU(ARM64)
6001OPGEN_RETURN(true);
6002#endif
6003break;
6004break;
6005default:
6006break;
6007}
6008break;
6009default:
6010break;
6011}
6012break;
6013default:
6014break;
6015}
6016break;
6017case Opcode::LoadAcq64:
6018switch (sizeof...(Arguments)) {
6019case 2:
6020switch (opgenHiddenPtrIdentity(kinds)[0]) {
6021case Arg::SimpleAddr:
6022switch (opgenHiddenPtrIdentity(kinds)[1]) {
6023case Arg::Tmp:
6024#if CPU(ARM64)
6025OPGEN_RETURN(true);
6026#endif
6027break;
6028break;
6029default:
6030break;
6031}
6032break;
6033default:
6034break;
6035}
6036break;
6037default:
6038break;
6039}
6040break;
6041case Opcode::StoreRel64:
6042switch (sizeof...(Arguments)) {
6043case 2:
6044switch (opgenHiddenPtrIdentity(kinds)[0]) {
6045case Arg::Tmp:
6046switch (opgenHiddenPtrIdentity(kinds)[1]) {
6047case Arg::SimpleAddr:
6048#if CPU(ARM64)
6049OPGEN_RETURN(true);
6050#endif
6051break;
6052break;
6053default:
6054break;
6055}
6056break;
6057default:
6058break;
6059}
6060break;
6061default:
6062break;
6063}
6064break;
6065case Opcode::Xchg8:
6066switch (sizeof...(Arguments)) {
6067case 2:
6068switch (opgenHiddenPtrIdentity(kinds)[0]) {
6069case Arg::Tmp:
6070switch (opgenHiddenPtrIdentity(kinds)[1]) {
6071case Arg::Addr:
6072case Arg::Stack:
6073case Arg::CallArg:
6074#if CPU(X86) || CPU(X86_64)
6075OPGEN_RETURN(true);
6076#endif
6077break;
6078break;
6079case Arg::Index:
6080#if CPU(X86) || CPU(X86_64)
6081OPGEN_RETURN(true);
6082#endif
6083break;
6084break;
6085default:
6086break;
6087}
6088break;
6089default:
6090break;
6091}
6092break;
6093default:
6094break;
6095}
6096break;
6097case Opcode::Xchg16:
6098switch (sizeof...(Arguments)) {
6099case 2:
6100switch (opgenHiddenPtrIdentity(kinds)[0]) {
6101case Arg::Tmp:
6102switch (opgenHiddenPtrIdentity(kinds)[1]) {
6103case Arg::Addr:
6104case Arg::Stack:
6105case Arg::CallArg:
6106#if CPU(X86) || CPU(X86_64)
6107OPGEN_RETURN(true);
6108#endif
6109break;
6110break;
6111case Arg::Index:
6112#if CPU(X86) || CPU(X86_64)
6113OPGEN_RETURN(true);
6114#endif
6115break;
6116break;
6117default:
6118break;
6119}
6120break;
6121default:
6122break;
6123}
6124break;
6125default:
6126break;
6127}
6128break;
6129case Opcode::Xchg32:
6130switch (sizeof...(Arguments)) {
6131case 2:
6132switch (opgenHiddenPtrIdentity(kinds)[0]) {
6133case Arg::Tmp:
6134switch (opgenHiddenPtrIdentity(kinds)[1]) {
6135case Arg::Addr:
6136case Arg::Stack:
6137case Arg::CallArg:
6138#if CPU(X86) || CPU(X86_64)
6139OPGEN_RETURN(true);
6140#endif
6141break;
6142break;
6143case Arg::Index:
6144#if CPU(X86) || CPU(X86_64)
6145OPGEN_RETURN(true);
6146#endif
6147break;
6148break;
6149default:
6150break;
6151}
6152break;
6153default:
6154break;
6155}
6156break;
6157default:
6158break;
6159}
6160break;
6161case Opcode::Xchg64:
6162switch (sizeof...(Arguments)) {
6163case 2:
6164switch (opgenHiddenPtrIdentity(kinds)[0]) {
6165case Arg::Tmp:
6166switch (opgenHiddenPtrIdentity(kinds)[1]) {
6167case Arg::Addr:
6168case Arg::Stack:
6169case Arg::CallArg:
6170#if CPU(X86_64)
6171OPGEN_RETURN(true);
6172#endif
6173break;
6174break;
6175case Arg::Index:
6176#if CPU(X86_64)
6177OPGEN_RETURN(true);
6178#endif
6179break;
6180break;
6181default:
6182break;
6183}
6184break;
6185default:
6186break;
6187}
6188break;
6189default:
6190break;
6191}
6192break;
6193case Opcode::AtomicStrongCAS8:
6194switch (sizeof...(Arguments)) {
6195case 5:
6196switch (opgenHiddenPtrIdentity(kinds)[0]) {
6197case Arg::StatusCond:
6198switch (opgenHiddenPtrIdentity(kinds)[1]) {
6199case Arg::Tmp:
6200switch (opgenHiddenPtrIdentity(kinds)[2]) {
6201case Arg::Tmp:
6202switch (opgenHiddenPtrIdentity(kinds)[3]) {
6203case Arg::Addr:
6204case Arg::Stack:
6205case Arg::CallArg:
6206switch (opgenHiddenPtrIdentity(kinds)[4]) {
6207case Arg::Tmp:
6208break;
6209break;
6210default:
6211break;
6212}
6213break;
6214case Arg::Index:
6215switch (opgenHiddenPtrIdentity(kinds)[4]) {
6216case Arg::Tmp:
6217break;
6218break;
6219default:
6220break;
6221}
6222break;
6223default:
6224break;
6225}
6226break;
6227default:
6228break;
6229}
6230break;
6231default:
6232break;
6233}
6234break;
6235default:
6236break;
6237}
6238break;
6239case 3:
6240switch (opgenHiddenPtrIdentity(kinds)[0]) {
6241case Arg::Tmp:
6242switch (opgenHiddenPtrIdentity(kinds)[1]) {
6243case Arg::Tmp:
6244switch (opgenHiddenPtrIdentity(kinds)[2]) {
6245case Arg::Addr:
6246case Arg::Stack:
6247case Arg::CallArg:
6248break;
6249break;
6250case Arg::Index:
6251break;
6252break;
6253default:
6254break;
6255}
6256break;
6257default:
6258break;
6259}
6260break;
6261default:
6262break;
6263}
6264break;
6265default:
6266break;
6267}
6268break;
6269case Opcode::AtomicStrongCAS16:
6270switch (sizeof...(Arguments)) {
6271case 5:
6272switch (opgenHiddenPtrIdentity(kinds)[0]) {
6273case Arg::StatusCond:
6274switch (opgenHiddenPtrIdentity(kinds)[1]) {
6275case Arg::Tmp:
6276switch (opgenHiddenPtrIdentity(kinds)[2]) {
6277case Arg::Tmp:
6278switch (opgenHiddenPtrIdentity(kinds)[3]) {
6279case Arg::Addr:
6280case Arg::Stack:
6281case Arg::CallArg:
6282switch (opgenHiddenPtrIdentity(kinds)[4]) {
6283case Arg::Tmp:
6284break;
6285break;
6286default:
6287break;
6288}
6289break;
6290case Arg::Index:
6291switch (opgenHiddenPtrIdentity(kinds)[4]) {
6292case Arg::Tmp:
6293break;
6294break;
6295default:
6296break;
6297}
6298break;
6299default:
6300break;
6301}
6302break;
6303default:
6304break;
6305}
6306break;
6307default:
6308break;
6309}
6310break;
6311default:
6312break;
6313}
6314break;
6315case 3:
6316switch (opgenHiddenPtrIdentity(kinds)[0]) {
6317case Arg::Tmp:
6318switch (opgenHiddenPtrIdentity(kinds)[1]) {
6319case Arg::Tmp:
6320switch (opgenHiddenPtrIdentity(kinds)[2]) {
6321case Arg::Addr:
6322case Arg::Stack:
6323case Arg::CallArg:
6324break;
6325break;
6326case Arg::Index:
6327break;
6328break;
6329default:
6330break;
6331}
6332break;
6333default:
6334break;
6335}
6336break;
6337default:
6338break;
6339}
6340break;
6341default:
6342break;
6343}
6344break;
6345case Opcode::AtomicStrongCAS32:
6346switch (sizeof...(Arguments)) {
6347case 5:
6348switch (opgenHiddenPtrIdentity(kinds)[0]) {
6349case Arg::StatusCond:
6350switch (opgenHiddenPtrIdentity(kinds)[1]) {
6351case Arg::Tmp:
6352switch (opgenHiddenPtrIdentity(kinds)[2]) {
6353case Arg::Tmp:
6354switch (opgenHiddenPtrIdentity(kinds)[3]) {
6355case Arg::Addr:
6356case Arg::Stack:
6357case Arg::CallArg:
6358switch (opgenHiddenPtrIdentity(kinds)[4]) {
6359case Arg::Tmp:
6360break;
6361break;
6362default:
6363break;
6364}
6365break;
6366case Arg::Index:
6367switch (opgenHiddenPtrIdentity(kinds)[4]) {
6368case Arg::Tmp:
6369break;
6370break;
6371default:
6372break;
6373}
6374break;
6375default:
6376break;
6377}
6378break;
6379default:
6380break;
6381}
6382break;
6383default:
6384break;
6385}
6386break;
6387default:
6388break;
6389}
6390break;
6391case 3:
6392switch (opgenHiddenPtrIdentity(kinds)[0]) {
6393case Arg::Tmp:
6394switch (opgenHiddenPtrIdentity(kinds)[1]) {
6395case Arg::Tmp:
6396switch (opgenHiddenPtrIdentity(kinds)[2]) {
6397case Arg::Addr:
6398case Arg::Stack:
6399case Arg::CallArg:
6400break;
6401break;
6402case Arg::Index:
6403break;
6404break;
6405default:
6406break;
6407}
6408break;
6409default:
6410break;
6411}
6412break;
6413default:
6414break;
6415}
6416break;
6417default:
6418break;
6419}
6420break;
6421case Opcode::AtomicStrongCAS64:
6422switch (sizeof...(Arguments)) {
6423case 5:
6424switch (opgenHiddenPtrIdentity(kinds)[0]) {
6425case Arg::StatusCond:
6426switch (opgenHiddenPtrIdentity(kinds)[1]) {
6427case Arg::Tmp:
6428switch (opgenHiddenPtrIdentity(kinds)[2]) {
6429case Arg::Tmp:
6430switch (opgenHiddenPtrIdentity(kinds)[3]) {
6431case Arg::Addr:
6432case Arg::Stack:
6433case Arg::CallArg:
6434switch (opgenHiddenPtrIdentity(kinds)[4]) {
6435case Arg::Tmp:
6436break;
6437break;
6438default:
6439break;
6440}
6441break;
6442case Arg::Index:
6443switch (opgenHiddenPtrIdentity(kinds)[4]) {
6444case Arg::Tmp:
6445break;
6446break;
6447default:
6448break;
6449}
6450break;
6451default:
6452break;
6453}
6454break;
6455default:
6456break;
6457}
6458break;
6459default:
6460break;
6461}
6462break;
6463default:
6464break;
6465}
6466break;
6467case 3:
6468switch (opgenHiddenPtrIdentity(kinds)[0]) {
6469case Arg::Tmp:
6470switch (opgenHiddenPtrIdentity(kinds)[1]) {
6471case Arg::Tmp:
6472switch (opgenHiddenPtrIdentity(kinds)[2]) {
6473case Arg::Addr:
6474case Arg::Stack:
6475case Arg::CallArg:
6476break;
6477break;
6478case Arg::Index:
6479break;
6480break;
6481default:
6482break;
6483}
6484break;
6485default:
6486break;
6487}
6488break;
6489default:
6490break;
6491}
6492break;
6493default:
6494break;
6495}
6496break;
6497case Opcode::BranchAtomicStrongCAS8:
6498switch (sizeof...(Arguments)) {
6499case 4:
6500switch (opgenHiddenPtrIdentity(kinds)[0]) {
6501case Arg::StatusCond:
6502switch (opgenHiddenPtrIdentity(kinds)[1]) {
6503case Arg::Tmp:
6504switch (opgenHiddenPtrIdentity(kinds)[2]) {
6505case Arg::Tmp:
6506switch (opgenHiddenPtrIdentity(kinds)[3]) {
6507case Arg::Addr:
6508case Arg::Stack:
6509case Arg::CallArg:
6510break;
6511break;
6512case Arg::Index:
6513break;
6514break;
6515default:
6516break;
6517}
6518break;
6519default:
6520break;
6521}
6522break;
6523default:
6524break;
6525}
6526break;
6527default:
6528break;
6529}
6530break;
6531default:
6532break;
6533}
6534break;
6535case Opcode::BranchAtomicStrongCAS16:
6536switch (sizeof...(Arguments)) {
6537case 4:
6538switch (opgenHiddenPtrIdentity(kinds)[0]) {
6539case Arg::StatusCond:
6540switch (opgenHiddenPtrIdentity(kinds)[1]) {
6541case Arg::Tmp:
6542switch (opgenHiddenPtrIdentity(kinds)[2]) {
6543case Arg::Tmp:
6544switch (opgenHiddenPtrIdentity(kinds)[3]) {
6545case Arg::Addr:
6546case Arg::Stack:
6547case Arg::CallArg:
6548break;
6549break;
6550case Arg::Index:
6551break;
6552break;
6553default:
6554break;
6555}
6556break;
6557default:
6558break;
6559}
6560break;
6561default:
6562break;
6563}
6564break;
6565default:
6566break;
6567}
6568break;
6569default:
6570break;
6571}
6572break;
6573case Opcode::BranchAtomicStrongCAS32:
6574switch (sizeof...(Arguments)) {
6575case 4:
6576switch (opgenHiddenPtrIdentity(kinds)[0]) {
6577case Arg::StatusCond:
6578switch (opgenHiddenPtrIdentity(kinds)[1]) {
6579case Arg::Tmp:
6580switch (opgenHiddenPtrIdentity(kinds)[2]) {
6581case Arg::Tmp:
6582switch (opgenHiddenPtrIdentity(kinds)[3]) {
6583case Arg::Addr:
6584case Arg::Stack:
6585case Arg::CallArg:
6586break;
6587break;
6588case Arg::Index:
6589break;
6590break;
6591default:
6592break;
6593}
6594break;
6595default:
6596break;
6597}
6598break;
6599default:
6600break;
6601}
6602break;
6603default:
6604break;
6605}
6606break;
6607default:
6608break;
6609}
6610break;
6611case Opcode::BranchAtomicStrongCAS64:
6612switch (sizeof...(Arguments)) {
6613case 4:
6614switch (opgenHiddenPtrIdentity(kinds)[0]) {
6615case Arg::StatusCond:
6616switch (opgenHiddenPtrIdentity(kinds)[1]) {
6617case Arg::Tmp:
6618switch (opgenHiddenPtrIdentity(kinds)[2]) {
6619case Arg::Tmp:
6620switch (opgenHiddenPtrIdentity(kinds)[3]) {
6621case Arg::Addr:
6622case Arg::Stack:
6623case Arg::CallArg:
6624break;
6625break;
6626case Arg::Index:
6627break;
6628break;
6629default:
6630break;
6631}
6632break;
6633default:
6634break;
6635}
6636break;
6637default:
6638break;
6639}
6640break;
6641default:
6642break;
6643}
6644break;
6645default:
6646break;
6647}
6648break;
6649case Opcode::AtomicAdd8:
6650switch (sizeof...(Arguments)) {
6651case 2:
6652switch (opgenHiddenPtrIdentity(kinds)[0]) {
6653case Arg::Imm:
6654switch (opgenHiddenPtrIdentity(kinds)[1]) {
6655case Arg::Addr:
6656case Arg::Stack:
6657case Arg::CallArg:
6658#if CPU(X86) || CPU(X86_64)
6659OPGEN_RETURN(true);
6660#endif
6661break;
6662break;
6663case Arg::Index:
6664#if CPU(X86) || CPU(X86_64)
6665OPGEN_RETURN(true);
6666#endif
6667break;
6668break;
6669default:
6670break;
6671}
6672break;
6673case Arg::Tmp:
6674switch (opgenHiddenPtrIdentity(kinds)[1]) {
6675case Arg::Addr:
6676case Arg::Stack:
6677case Arg::CallArg:
6678#if CPU(X86) || CPU(X86_64)
6679OPGEN_RETURN(true);
6680#endif
6681break;
6682break;
6683case Arg::Index:
6684#if CPU(X86) || CPU(X86_64)
6685OPGEN_RETURN(true);
6686#endif
6687break;
6688break;
6689default:
6690break;
6691}
6692break;
6693default:
6694break;
6695}
6696break;
6697default:
6698break;
6699}
6700break;
6701case Opcode::AtomicAdd16:
6702switch (sizeof...(Arguments)) {
6703case 2:
6704switch (opgenHiddenPtrIdentity(kinds)[0]) {
6705case Arg::Imm:
6706switch (opgenHiddenPtrIdentity(kinds)[1]) {
6707case Arg::Addr:
6708case Arg::Stack:
6709case Arg::CallArg:
6710#if CPU(X86) || CPU(X86_64)
6711OPGEN_RETURN(true);
6712#endif
6713break;
6714break;
6715case Arg::Index:
6716#if CPU(X86) || CPU(X86_64)
6717OPGEN_RETURN(true);
6718#endif
6719break;
6720break;
6721default:
6722break;
6723}
6724break;
6725case Arg::Tmp:
6726switch (opgenHiddenPtrIdentity(kinds)[1]) {
6727case Arg::Addr:
6728case Arg::Stack:
6729case Arg::CallArg:
6730#if CPU(X86) || CPU(X86_64)
6731OPGEN_RETURN(true);
6732#endif
6733break;
6734break;
6735case Arg::Index:
6736#if CPU(X86) || CPU(X86_64)
6737OPGEN_RETURN(true);
6738#endif
6739break;
6740break;
6741default:
6742break;
6743}
6744break;
6745default:
6746break;
6747}
6748break;
6749default:
6750break;
6751}
6752break;
6753case Opcode::AtomicAdd32:
6754switch (sizeof...(Arguments)) {
6755case 2:
6756switch (opgenHiddenPtrIdentity(kinds)[0]) {
6757case Arg::Imm:
6758switch (opgenHiddenPtrIdentity(kinds)[1]) {
6759case Arg::Addr:
6760case Arg::Stack:
6761case Arg::CallArg:
6762#if CPU(X86) || CPU(X86_64)
6763OPGEN_RETURN(true);
6764#endif
6765break;
6766break;
6767case Arg::Index:
6768#if CPU(X86) || CPU(X86_64)
6769OPGEN_RETURN(true);
6770#endif
6771break;
6772break;
6773default:
6774break;
6775}
6776break;
6777case Arg::Tmp:
6778switch (opgenHiddenPtrIdentity(kinds)[1]) {
6779case Arg::Addr:
6780case Arg::Stack:
6781case Arg::CallArg:
6782#if CPU(X86) || CPU(X86_64)
6783OPGEN_RETURN(true);
6784#endif
6785break;
6786break;
6787case Arg::Index:
6788#if CPU(X86) || CPU(X86_64)
6789OPGEN_RETURN(true);
6790#endif
6791break;
6792break;
6793default:
6794break;
6795}
6796break;
6797default:
6798break;
6799}
6800break;
6801default:
6802break;
6803}
6804break;
6805case Opcode::AtomicAdd64:
6806switch (sizeof...(Arguments)) {
6807case 2:
6808switch (opgenHiddenPtrIdentity(kinds)[0]) {
6809case Arg::Imm:
6810switch (opgenHiddenPtrIdentity(kinds)[1]) {
6811case Arg::Addr:
6812case Arg::Stack:
6813case Arg::CallArg:
6814#if CPU(X86_64)
6815OPGEN_RETURN(true);
6816#endif
6817break;
6818break;
6819case Arg::Index:
6820#if CPU(X86_64)
6821OPGEN_RETURN(true);
6822#endif
6823break;
6824break;
6825default:
6826break;
6827}
6828break;
6829case Arg::Tmp:
6830switch (opgenHiddenPtrIdentity(kinds)[1]) {
6831case Arg::Addr:
6832case Arg::Stack:
6833case Arg::CallArg:
6834#if CPU(X86_64)
6835OPGEN_RETURN(true);
6836#endif
6837break;
6838break;
6839case Arg::Index:
6840#if CPU(X86_64)
6841OPGEN_RETURN(true);
6842#endif
6843break;
6844break;
6845default:
6846break;
6847}
6848break;
6849default:
6850break;
6851}
6852break;
6853default:
6854break;
6855}
6856break;
6857case Opcode::AtomicSub8:
6858switch (sizeof...(Arguments)) {
6859case 2:
6860switch (opgenHiddenPtrIdentity(kinds)[0]) {
6861case Arg::Imm:
6862switch (opgenHiddenPtrIdentity(kinds)[1]) {
6863case Arg::Addr:
6864case Arg::Stack:
6865case Arg::CallArg:
6866#if CPU(X86) || CPU(X86_64)
6867OPGEN_RETURN(true);
6868#endif
6869break;
6870break;
6871case Arg::Index:
6872#if CPU(X86) || CPU(X86_64)
6873OPGEN_RETURN(true);
6874#endif
6875break;
6876break;
6877default:
6878break;
6879}
6880break;
6881case Arg::Tmp:
6882switch (opgenHiddenPtrIdentity(kinds)[1]) {
6883case Arg::Addr:
6884case Arg::Stack:
6885case Arg::CallArg:
6886#if CPU(X86) || CPU(X86_64)
6887OPGEN_RETURN(true);
6888#endif
6889break;
6890break;
6891case Arg::Index:
6892#if CPU(X86) || CPU(X86_64)
6893OPGEN_RETURN(true);
6894#endif
6895break;
6896break;
6897default:
6898break;
6899}
6900break;
6901default:
6902break;
6903}
6904break;
6905default:
6906break;
6907}
6908break;
6909case Opcode::AtomicSub16:
6910switch (sizeof...(Arguments)) {
6911case 2:
6912switch (opgenHiddenPtrIdentity(kinds)[0]) {
6913case Arg::Imm:
6914switch (opgenHiddenPtrIdentity(kinds)[1]) {
6915case Arg::Addr:
6916case Arg::Stack:
6917case Arg::CallArg:
6918#if CPU(X86) || CPU(X86_64)
6919OPGEN_RETURN(true);
6920#endif
6921break;
6922break;
6923case Arg::Index:
6924#if CPU(X86) || CPU(X86_64)
6925OPGEN_RETURN(true);
6926#endif
6927break;
6928break;
6929default:
6930break;
6931}
6932break;
6933case Arg::Tmp:
6934switch (opgenHiddenPtrIdentity(kinds)[1]) {
6935case Arg::Addr:
6936case Arg::Stack:
6937case Arg::CallArg:
6938#if CPU(X86) || CPU(X86_64)
6939OPGEN_RETURN(true);
6940#endif
6941break;
6942break;
6943case Arg::Index:
6944#if CPU(X86) || CPU(X86_64)
6945OPGEN_RETURN(true);
6946#endif
6947break;
6948break;
6949default:
6950break;
6951}
6952break;
6953default:
6954break;
6955}
6956break;
6957default:
6958break;
6959}
6960break;
6961case Opcode::AtomicSub32:
6962switch (sizeof...(Arguments)) {
6963case 2:
6964switch (opgenHiddenPtrIdentity(kinds)[0]) {
6965case Arg::Imm:
6966switch (opgenHiddenPtrIdentity(kinds)[1]) {
6967case Arg::Addr:
6968case Arg::Stack:
6969case Arg::CallArg:
6970#if CPU(X86) || CPU(X86_64)
6971OPGEN_RETURN(true);
6972#endif
6973break;
6974break;
6975case Arg::Index:
6976#if CPU(X86) || CPU(X86_64)
6977OPGEN_RETURN(true);
6978#endif
6979break;
6980break;
6981default:
6982break;
6983}
6984break;
6985case Arg::Tmp:
6986switch (opgenHiddenPtrIdentity(kinds)[1]) {
6987case Arg::Addr:
6988case Arg::Stack:
6989case Arg::CallArg:
6990#if CPU(X86) || CPU(X86_64)
6991OPGEN_RETURN(true);
6992#endif
6993break;
6994break;
6995case Arg::Index:
6996#if CPU(X86) || CPU(X86_64)
6997OPGEN_RETURN(true);
6998#endif
6999break;
7000break;
7001default:
7002break;
7003}
7004break;
7005default:
7006break;
7007}
7008break;
7009default:
7010break;
7011}
7012break;
7013case Opcode::AtomicSub64:
7014switch (sizeof...(Arguments)) {
7015case 2:
7016switch (opgenHiddenPtrIdentity(kinds)[0]) {
7017case Arg::Imm:
7018switch (opgenHiddenPtrIdentity(kinds)[1]) {
7019case Arg::Addr:
7020case Arg::Stack:
7021case Arg::CallArg:
7022#if CPU(X86_64)
7023OPGEN_RETURN(true);
7024#endif
7025break;
7026break;
7027case Arg::Index:
7028#if CPU(X86_64)
7029OPGEN_RETURN(true);
7030#endif
7031break;
7032break;
7033default:
7034break;
7035}
7036break;
7037case Arg::Tmp:
7038switch (opgenHiddenPtrIdentity(kinds)[1]) {
7039case Arg::Addr:
7040case Arg::Stack:
7041case Arg::CallArg:
7042#if CPU(X86_64)
7043OPGEN_RETURN(true);
7044#endif
7045break;
7046break;
7047case Arg::Index:
7048#if CPU(X86_64)
7049OPGEN_RETURN(true);
7050#endif
7051break;
7052break;
7053default:
7054break;
7055}
7056break;
7057default:
7058break;
7059}
7060break;
7061default:
7062break;
7063}
7064break;
7065case Opcode::AtomicAnd8:
7066switch (sizeof...(Arguments)) {
7067case 2:
7068switch (opgenHiddenPtrIdentity(kinds)[0]) {
7069case Arg::Imm:
7070switch (opgenHiddenPtrIdentity(kinds)[1]) {
7071case Arg::Addr:
7072case Arg::Stack:
7073case Arg::CallArg:
7074#if CPU(X86) || CPU(X86_64)
7075OPGEN_RETURN(true);
7076#endif
7077break;
7078break;
7079case Arg::Index:
7080#if CPU(X86) || CPU(X86_64)
7081OPGEN_RETURN(true);
7082#endif
7083break;
7084break;
7085default:
7086break;
7087}
7088break;
7089case Arg::Tmp:
7090switch (opgenHiddenPtrIdentity(kinds)[1]) {
7091case Arg::Addr:
7092case Arg::Stack:
7093case Arg::CallArg:
7094#if CPU(X86) || CPU(X86_64)
7095OPGEN_RETURN(true);
7096#endif
7097break;
7098break;
7099case Arg::Index:
7100#if CPU(X86) || CPU(X86_64)
7101OPGEN_RETURN(true);
7102#endif
7103break;
7104break;
7105default:
7106break;
7107}
7108break;
7109default:
7110break;
7111}
7112break;
7113default:
7114break;
7115}
7116break;
7117case Opcode::AtomicAnd16:
7118switch (sizeof...(Arguments)) {
7119case 2:
7120switch (opgenHiddenPtrIdentity(kinds)[0]) {
7121case Arg::Imm:
7122switch (opgenHiddenPtrIdentity(kinds)[1]) {
7123case Arg::Addr:
7124case Arg::Stack:
7125case Arg::CallArg:
7126#if CPU(X86) || CPU(X86_64)
7127OPGEN_RETURN(true);
7128#endif
7129break;
7130break;
7131case Arg::Index:
7132#if CPU(X86) || CPU(X86_64)
7133OPGEN_RETURN(true);
7134#endif
7135break;
7136break;
7137default:
7138break;
7139}
7140break;
7141case Arg::Tmp:
7142switch (opgenHiddenPtrIdentity(kinds)[1]) {
7143case Arg::Addr:
7144case Arg::Stack:
7145case Arg::CallArg:
7146#if CPU(X86) || CPU(X86_64)
7147OPGEN_RETURN(true);
7148#endif
7149break;
7150break;
7151case Arg::Index:
7152#if CPU(X86) || CPU(X86_64)
7153OPGEN_RETURN(true);
7154#endif
7155break;
7156break;
7157default:
7158break;
7159}
7160break;
7161default:
7162break;
7163}
7164break;
7165default:
7166break;
7167}
7168break;
7169case Opcode::AtomicAnd32:
7170switch (sizeof...(Arguments)) {
7171case 2:
7172switch (opgenHiddenPtrIdentity(kinds)[0]) {
7173case Arg::Imm:
7174switch (opgenHiddenPtrIdentity(kinds)[1]) {
7175case Arg::Addr:
7176case Arg::Stack:
7177case Arg::CallArg:
7178#if CPU(X86) || CPU(X86_64)
7179OPGEN_RETURN(true);
7180#endif
7181break;
7182break;
7183case Arg::Index:
7184#if CPU(X86) || CPU(X86_64)
7185OPGEN_RETURN(true);
7186#endif
7187break;
7188break;
7189default:
7190break;
7191}
7192break;
7193case Arg::Tmp:
7194switch (opgenHiddenPtrIdentity(kinds)[1]) {
7195case Arg::Addr:
7196case Arg::Stack:
7197case Arg::CallArg:
7198#if CPU(X86) || CPU(X86_64)
7199OPGEN_RETURN(true);
7200#endif
7201break;
7202break;
7203case Arg::Index:
7204#if CPU(X86) || CPU(X86_64)
7205OPGEN_RETURN(true);
7206#endif
7207break;
7208break;
7209default:
7210break;
7211}
7212break;
7213default:
7214break;
7215}
7216break;
7217default:
7218break;
7219}
7220break;
7221case Opcode::AtomicAnd64:
7222switch (sizeof...(Arguments)) {
7223case 2:
7224switch (opgenHiddenPtrIdentity(kinds)[0]) {
7225case Arg::Imm:
7226switch (opgenHiddenPtrIdentity(kinds)[1]) {
7227case Arg::Addr:
7228case Arg::Stack:
7229case Arg::CallArg:
7230#if CPU(X86_64)
7231OPGEN_RETURN(true);
7232#endif
7233break;
7234break;
7235case Arg::Index:
7236#if CPU(X86_64)
7237OPGEN_RETURN(true);
7238#endif
7239break;
7240break;
7241default:
7242break;
7243}
7244break;
7245case Arg::Tmp:
7246switch (opgenHiddenPtrIdentity(kinds)[1]) {
7247case Arg::Addr:
7248case Arg::Stack:
7249case Arg::CallArg:
7250#if CPU(X86_64)
7251OPGEN_RETURN(true);
7252#endif
7253break;
7254break;
7255case Arg::Index:
7256#if CPU(X86_64)
7257OPGEN_RETURN(true);
7258#endif
7259break;
7260break;
7261default:
7262break;
7263}
7264break;
7265default:
7266break;
7267}
7268break;
7269default:
7270break;
7271}
7272break;
7273case Opcode::AtomicOr8:
7274switch (sizeof...(Arguments)) {
7275case 2:
7276switch (opgenHiddenPtrIdentity(kinds)[0]) {
7277case Arg::Imm:
7278switch (opgenHiddenPtrIdentity(kinds)[1]) {
7279case Arg::Addr:
7280case Arg::Stack:
7281case Arg::CallArg:
7282#if CPU(X86) || CPU(X86_64)
7283OPGEN_RETURN(true);
7284#endif
7285break;
7286break;
7287case Arg::Index:
7288#if CPU(X86) || CPU(X86_64)
7289OPGEN_RETURN(true);
7290#endif
7291break;
7292break;
7293default:
7294break;
7295}
7296break;
7297case Arg::Tmp:
7298switch (opgenHiddenPtrIdentity(kinds)[1]) {
7299case Arg::Addr:
7300case Arg::Stack:
7301case Arg::CallArg:
7302#if CPU(X86) || CPU(X86_64)
7303OPGEN_RETURN(true);
7304#endif
7305break;
7306break;
7307case Arg::Index:
7308#if CPU(X86) || CPU(X86_64)
7309OPGEN_RETURN(true);
7310#endif
7311break;
7312break;
7313default:
7314break;
7315}
7316break;
7317default:
7318break;
7319}
7320break;
7321default:
7322break;
7323}
7324break;
7325case Opcode::AtomicOr16:
7326switch (sizeof...(Arguments)) {
7327case 2:
7328switch (opgenHiddenPtrIdentity(kinds)[0]) {
7329case Arg::Imm:
7330switch (opgenHiddenPtrIdentity(kinds)[1]) {
7331case Arg::Addr:
7332case Arg::Stack:
7333case Arg::CallArg:
7334#if CPU(X86) || CPU(X86_64)
7335OPGEN_RETURN(true);
7336#endif
7337break;
7338break;
7339case Arg::Index:
7340#if CPU(X86) || CPU(X86_64)
7341OPGEN_RETURN(true);
7342#endif
7343break;
7344break;
7345default:
7346break;
7347}
7348break;
7349case Arg::Tmp:
7350switch (opgenHiddenPtrIdentity(kinds)[1]) {
7351case Arg::Addr:
7352case Arg::Stack:
7353case Arg::CallArg:
7354#if CPU(X86) || CPU(X86_64)
7355OPGEN_RETURN(true);
7356#endif
7357break;
7358break;
7359case Arg::Index:
7360#if CPU(X86) || CPU(X86_64)
7361OPGEN_RETURN(true);
7362#endif
7363break;
7364break;
7365default:
7366break;
7367}
7368break;
7369default:
7370break;
7371}
7372break;
7373default:
7374break;
7375}
7376break;
7377case Opcode::AtomicOr32:
7378switch (sizeof...(Arguments)) {
7379case 2:
7380switch (opgenHiddenPtrIdentity(kinds)[0]) {
7381case Arg::Imm:
7382switch (opgenHiddenPtrIdentity(kinds)[1]) {
7383case Arg::Addr:
7384case Arg::Stack:
7385case Arg::CallArg:
7386#if CPU(X86) || CPU(X86_64)
7387OPGEN_RETURN(true);
7388#endif
7389break;
7390break;
7391case Arg::Index:
7392#if CPU(X86) || CPU(X86_64)
7393OPGEN_RETURN(true);
7394#endif
7395break;
7396break;
7397default:
7398break;
7399}
7400break;
7401case Arg::Tmp:
7402switch (opgenHiddenPtrIdentity(kinds)[1]) {
7403case Arg::Addr:
7404case Arg::Stack:
7405case Arg::CallArg:
7406#if CPU(X86) || CPU(X86_64)
7407OPGEN_RETURN(true);
7408#endif
7409break;
7410break;
7411case Arg::Index:
7412#if CPU(X86) || CPU(X86_64)
7413OPGEN_RETURN(true);
7414#endif
7415break;
7416break;
7417default:
7418break;
7419}
7420break;
7421default:
7422break;
7423}
7424break;
7425default:
7426break;
7427}
7428break;
7429case Opcode::AtomicOr64:
7430switch (sizeof...(Arguments)) {
7431case 2:
7432switch (opgenHiddenPtrIdentity(kinds)[0]) {
7433case Arg::Imm:
7434switch (opgenHiddenPtrIdentity(kinds)[1]) {
7435case Arg::Addr:
7436case Arg::Stack:
7437case Arg::CallArg:
7438#if CPU(X86_64)
7439OPGEN_RETURN(true);
7440#endif
7441break;
7442break;
7443case Arg::Index:
7444#if CPU(X86_64)
7445OPGEN_RETURN(true);
7446#endif
7447break;
7448break;
7449default:
7450break;
7451}
7452break;
7453case Arg::Tmp:
7454switch (opgenHiddenPtrIdentity(kinds)[1]) {
7455case Arg::Addr:
7456case Arg::Stack:
7457case Arg::CallArg:
7458#if CPU(X86_64)
7459OPGEN_RETURN(true);
7460#endif
7461break;
7462break;
7463case Arg::Index:
7464#if CPU(X86_64)
7465OPGEN_RETURN(true);
7466#endif
7467break;
7468break;
7469default:
7470break;
7471}
7472break;
7473default:
7474break;
7475}
7476break;
7477default:
7478break;
7479}
7480break;
7481case Opcode::AtomicXor8:
7482switch (sizeof...(Arguments)) {
7483case 2:
7484switch (opgenHiddenPtrIdentity(kinds)[0]) {
7485case Arg::Imm:
7486switch (opgenHiddenPtrIdentity(kinds)[1]) {
7487case Arg::Addr:
7488case Arg::Stack:
7489case Arg::CallArg:
7490#if CPU(X86) || CPU(X86_64)
7491OPGEN_RETURN(true);
7492#endif
7493break;
7494break;
7495case Arg::Index:
7496#if CPU(X86) || CPU(X86_64)
7497OPGEN_RETURN(true);
7498#endif
7499break;
7500break;
7501default:
7502break;
7503}
7504break;
7505case Arg::Tmp:
7506switch (opgenHiddenPtrIdentity(kinds)[1]) {
7507case Arg::Addr:
7508case Arg::Stack:
7509case Arg::CallArg:
7510#if CPU(X86) || CPU(X86_64)
7511OPGEN_RETURN(true);
7512#endif
7513break;
7514break;
7515case Arg::Index:
7516#if CPU(X86) || CPU(X86_64)
7517OPGEN_RETURN(true);
7518#endif
7519break;
7520break;
7521default:
7522break;
7523}
7524break;
7525default:
7526break;
7527}
7528break;
7529default:
7530break;
7531}
7532break;
7533case Opcode::AtomicXor16:
7534switch (sizeof...(Arguments)) {
7535case 2:
7536switch (opgenHiddenPtrIdentity(kinds)[0]) {
7537case Arg::Imm:
7538switch (opgenHiddenPtrIdentity(kinds)[1]) {
7539case Arg::Addr:
7540case Arg::Stack:
7541case Arg::CallArg:
7542#if CPU(X86) || CPU(X86_64)
7543OPGEN_RETURN(true);
7544#endif
7545break;
7546break;
7547case Arg::Index:
7548#if CPU(X86) || CPU(X86_64)
7549OPGEN_RETURN(true);
7550#endif
7551break;
7552break;
7553default:
7554break;
7555}
7556break;
7557case Arg::Tmp:
7558switch (opgenHiddenPtrIdentity(kinds)[1]) {
7559case Arg::Addr:
7560case Arg::Stack:
7561case Arg::CallArg:
7562#if CPU(X86) || CPU(X86_64)
7563OPGEN_RETURN(true);
7564#endif
7565break;
7566break;
7567case Arg::Index:
7568#if CPU(X86) || CPU(X86_64)
7569OPGEN_RETURN(true);
7570#endif
7571break;
7572break;
7573default:
7574break;
7575}
7576break;
7577default:
7578break;
7579}
7580break;
7581default:
7582break;
7583}
7584break;
7585case Opcode::AtomicXor32:
7586switch (sizeof...(Arguments)) {
7587case 2:
7588switch (opgenHiddenPtrIdentity(kinds)[0]) {
7589case Arg::Imm:
7590switch (opgenHiddenPtrIdentity(kinds)[1]) {
7591case Arg::Addr:
7592case Arg::Stack:
7593case Arg::CallArg:
7594#if CPU(X86) || CPU(X86_64)
7595OPGEN_RETURN(true);
7596#endif
7597break;
7598break;
7599case Arg::Index:
7600#if CPU(X86) || CPU(X86_64)
7601OPGEN_RETURN(true);
7602#endif
7603break;
7604break;
7605default:
7606break;
7607}
7608break;
7609case Arg::Tmp:
7610switch (opgenHiddenPtrIdentity(kinds)[1]) {
7611case Arg::Addr:
7612case Arg::Stack:
7613case Arg::CallArg:
7614#if CPU(X86) || CPU(X86_64)
7615OPGEN_RETURN(true);
7616#endif
7617break;
7618break;
7619case Arg::Index:
7620#if CPU(X86) || CPU(X86_64)
7621OPGEN_RETURN(true);
7622#endif
7623break;
7624break;
7625default:
7626break;
7627}
7628break;
7629default:
7630break;
7631}
7632break;
7633default:
7634break;
7635}
7636break;
7637case Opcode::AtomicXor64:
7638switch (sizeof...(Arguments)) {
7639case 2:
7640switch (opgenHiddenPtrIdentity(kinds)[0]) {
7641case Arg::Imm:
7642switch (opgenHiddenPtrIdentity(kinds)[1]) {
7643case Arg::Addr:
7644case Arg::Stack:
7645case Arg::CallArg:
7646#if CPU(X86_64)
7647OPGEN_RETURN(true);
7648#endif
7649break;
7650break;
7651case Arg::Index:
7652#if CPU(X86_64)
7653OPGEN_RETURN(true);
7654#endif
7655break;
7656break;
7657default:
7658break;
7659}
7660break;
7661case Arg::Tmp:
7662switch (opgenHiddenPtrIdentity(kinds)[1]) {
7663case Arg::Addr:
7664case Arg::Stack:
7665case Arg::CallArg:
7666#if CPU(X86_64)
7667OPGEN_RETURN(true);
7668#endif
7669break;
7670break;
7671case Arg::Index:
7672#if CPU(X86_64)
7673OPGEN_RETURN(true);
7674#endif
7675break;
7676break;
7677default:
7678break;
7679}
7680break;
7681default:
7682break;
7683}
7684break;
7685default:
7686break;
7687}
7688break;
7689case Opcode::AtomicNeg8:
7690switch (sizeof...(Arguments)) {
7691case 1:
7692switch (opgenHiddenPtrIdentity(kinds)[0]) {
7693case Arg::Addr:
7694case Arg::Stack:
7695case Arg::CallArg:
7696#if CPU(X86) || CPU(X86_64)
7697OPGEN_RETURN(true);
7698#endif
7699break;
7700break;
7701case Arg::Index:
7702#if CPU(X86) || CPU(X86_64)
7703OPGEN_RETURN(true);
7704#endif
7705break;
7706break;
7707default:
7708break;
7709}
7710break;
7711default:
7712break;
7713}
7714break;
7715case Opcode::AtomicNeg16:
7716switch (sizeof...(Arguments)) {
7717case 1:
7718switch (opgenHiddenPtrIdentity(kinds)[0]) {
7719case Arg::Addr:
7720case Arg::Stack:
7721case Arg::CallArg:
7722#if CPU(X86) || CPU(X86_64)
7723OPGEN_RETURN(true);
7724#endif
7725break;
7726break;
7727case Arg::Index:
7728#if CPU(X86) || CPU(X86_64)
7729OPGEN_RETURN(true);
7730#endif
7731break;
7732break;
7733default:
7734break;
7735}
7736break;
7737default:
7738break;
7739}
7740break;
7741case Opcode::AtomicNeg32:
7742switch (sizeof...(Arguments)) {
7743case 1:
7744switch (opgenHiddenPtrIdentity(kinds)[0]) {
7745case Arg::Addr:
7746case Arg::Stack:
7747case Arg::CallArg:
7748#if CPU(X86) || CPU(X86_64)
7749OPGEN_RETURN(true);
7750#endif
7751break;
7752break;
7753case Arg::Index:
7754#if CPU(X86) || CPU(X86_64)
7755OPGEN_RETURN(true);
7756#endif
7757break;
7758break;
7759default:
7760break;
7761}
7762break;
7763default:
7764break;
7765}
7766break;
7767case Opcode::AtomicNeg64:
7768switch (sizeof...(Arguments)) {
7769case 1:
7770switch (opgenHiddenPtrIdentity(kinds)[0]) {
7771case Arg::Addr:
7772case Arg::Stack:
7773case Arg::CallArg:
7774#if CPU(X86_64)
7775OPGEN_RETURN(true);
7776#endif
7777break;
7778break;
7779case Arg::Index:
7780#if CPU(X86_64)
7781OPGEN_RETURN(true);
7782#endif
7783break;
7784break;
7785default:
7786break;
7787}
7788break;
7789default:
7790break;
7791}
7792break;
7793case Opcode::AtomicNot8:
7794switch (sizeof...(Arguments)) {
7795case 1:
7796switch (opgenHiddenPtrIdentity(kinds)[0]) {
7797case Arg::Addr:
7798case Arg::Stack:
7799case Arg::CallArg:
7800#if CPU(X86) || CPU(X86_64)
7801OPGEN_RETURN(true);
7802#endif
7803break;
7804break;
7805case Arg::Index:
7806#if CPU(X86) || CPU(X86_64)
7807OPGEN_RETURN(true);
7808#endif
7809break;
7810break;
7811default:
7812break;
7813}
7814break;
7815default:
7816break;
7817}
7818break;
7819case Opcode::AtomicNot16:
7820switch (sizeof...(Arguments)) {
7821case 1:
7822switch (opgenHiddenPtrIdentity(kinds)[0]) {
7823case Arg::Addr:
7824case Arg::Stack:
7825case Arg::CallArg:
7826#if CPU(X86) || CPU(X86_64)
7827OPGEN_RETURN(true);
7828#endif
7829break;
7830break;
7831case Arg::Index:
7832#if CPU(X86) || CPU(X86_64)
7833OPGEN_RETURN(true);
7834#endif
7835break;
7836break;
7837default:
7838break;
7839}
7840break;
7841default:
7842break;
7843}
7844break;
7845case Opcode::AtomicNot32:
7846switch (sizeof...(Arguments)) {
7847case 1:
7848switch (opgenHiddenPtrIdentity(kinds)[0]) {
7849case Arg::Addr:
7850case Arg::Stack:
7851case Arg::CallArg:
7852#if CPU(X86) || CPU(X86_64)
7853OPGEN_RETURN(true);
7854#endif
7855break;
7856break;
7857case Arg::Index:
7858#if CPU(X86) || CPU(X86_64)
7859OPGEN_RETURN(true);
7860#endif
7861break;
7862break;
7863default:
7864break;
7865}
7866break;
7867default:
7868break;
7869}
7870break;
7871case Opcode::AtomicNot64:
7872switch (sizeof...(Arguments)) {
7873case 1:
7874switch (opgenHiddenPtrIdentity(kinds)[0]) {
7875case Arg::Addr:
7876case Arg::Stack:
7877case Arg::CallArg:
7878#if CPU(X86_64)
7879OPGEN_RETURN(true);
7880#endif
7881break;
7882break;
7883case Arg::Index:
7884#if CPU(X86_64)
7885OPGEN_RETURN(true);
7886#endif
7887break;
7888break;
7889default:
7890break;
7891}
7892break;
7893default:
7894break;
7895}
7896break;
7897case Opcode::AtomicXchgAdd8:
7898switch (sizeof...(Arguments)) {
7899case 2:
7900switch (opgenHiddenPtrIdentity(kinds)[0]) {
7901case Arg::Tmp:
7902switch (opgenHiddenPtrIdentity(kinds)[1]) {
7903case Arg::Addr:
7904case Arg::Stack:
7905case Arg::CallArg:
7906#if CPU(X86) || CPU(X86_64)
7907OPGEN_RETURN(true);
7908#endif
7909break;
7910break;
7911case Arg::Index:
7912#if CPU(X86) || CPU(X86_64)
7913OPGEN_RETURN(true);
7914#endif
7915break;
7916break;
7917default:
7918break;
7919}
7920break;
7921default:
7922break;
7923}
7924break;
7925default:
7926break;
7927}
7928break;
7929case Opcode::AtomicXchgAdd16:
7930switch (sizeof...(Arguments)) {
7931case 2:
7932switch (opgenHiddenPtrIdentity(kinds)[0]) {
7933case Arg::Tmp:
7934switch (opgenHiddenPtrIdentity(kinds)[1]) {
7935case Arg::Addr:
7936case Arg::Stack:
7937case Arg::CallArg:
7938#if CPU(X86) || CPU(X86_64)
7939OPGEN_RETURN(true);
7940#endif
7941break;
7942break;
7943case Arg::Index:
7944#if CPU(X86) || CPU(X86_64)
7945OPGEN_RETURN(true);
7946#endif
7947break;
7948break;
7949default:
7950break;
7951}
7952break;
7953default:
7954break;
7955}
7956break;
7957default:
7958break;
7959}
7960break;
7961case Opcode::AtomicXchgAdd32:
7962switch (sizeof...(Arguments)) {
7963case 2:
7964switch (opgenHiddenPtrIdentity(kinds)[0]) {
7965case Arg::Tmp:
7966switch (opgenHiddenPtrIdentity(kinds)[1]) {
7967case Arg::Addr:
7968case Arg::Stack:
7969case Arg::CallArg:
7970#if CPU(X86) || CPU(X86_64)
7971OPGEN_RETURN(true);
7972#endif
7973break;
7974break;
7975case Arg::Index:
7976#if CPU(X86) || CPU(X86_64)
7977OPGEN_RETURN(true);
7978#endif
7979break;
7980break;
7981default:
7982break;
7983}
7984break;
7985default:
7986break;
7987}
7988break;
7989default:
7990break;
7991}
7992break;
7993case Opcode::AtomicXchgAdd64:
7994switch (sizeof...(Arguments)) {
7995case 2:
7996switch (opgenHiddenPtrIdentity(kinds)[0]) {
7997case Arg::Tmp:
7998switch (opgenHiddenPtrIdentity(kinds)[1]) {
7999case Arg::Addr:
8000case Arg::Stack:
8001case Arg::CallArg:
8002#if CPU(X86_64)
8003OPGEN_RETURN(true);
8004#endif
8005break;
8006break;
8007case Arg::Index:
8008#if CPU(X86_64)
8009OPGEN_RETURN(true);
8010#endif
8011break;
8012break;
8013default:
8014break;
8015}
8016break;
8017default:
8018break;
8019}
8020break;
8021default:
8022break;
8023}
8024break;
8025case Opcode::AtomicXchg8:
8026switch (sizeof...(Arguments)) {
8027case 2:
8028switch (opgenHiddenPtrIdentity(kinds)[0]) {
8029case Arg::Tmp:
8030switch (opgenHiddenPtrIdentity(kinds)[1]) {
8031case Arg::Addr:
8032case Arg::Stack:
8033case Arg::CallArg:
8034#if CPU(X86) || CPU(X86_64)
8035OPGEN_RETURN(true);
8036#endif
8037break;
8038break;
8039case Arg::Index:
8040#if CPU(X86) || CPU(X86_64)
8041OPGEN_RETURN(true);
8042#endif
8043break;
8044break;
8045default:
8046break;
8047}
8048break;
8049default:
8050break;
8051}
8052break;
8053default:
8054break;
8055}
8056break;
8057case Opcode::AtomicXchg16:
8058switch (sizeof...(Arguments)) {
8059case 2:
8060switch (opgenHiddenPtrIdentity(kinds)[0]) {
8061case Arg::Tmp:
8062switch (opgenHiddenPtrIdentity(kinds)[1]) {
8063case Arg::Addr:
8064case Arg::Stack:
8065case Arg::CallArg:
8066#if CPU(X86) || CPU(X86_64)
8067OPGEN_RETURN(true);
8068#endif
8069break;
8070break;
8071case Arg::Index:
8072#if CPU(X86) || CPU(X86_64)
8073OPGEN_RETURN(true);
8074#endif
8075break;
8076break;
8077default:
8078break;
8079}
8080break;
8081default:
8082break;
8083}
8084break;
8085default:
8086break;
8087}
8088break;
8089case Opcode::AtomicXchg32:
8090switch (sizeof...(Arguments)) {
8091case 2:
8092switch (opgenHiddenPtrIdentity(kinds)[0]) {
8093case Arg::Tmp:
8094switch (opgenHiddenPtrIdentity(kinds)[1]) {
8095case Arg::Addr:
8096case Arg::Stack:
8097case Arg::CallArg:
8098#if CPU(X86) || CPU(X86_64)
8099OPGEN_RETURN(true);
8100#endif
8101break;
8102break;
8103case Arg::Index:
8104#if CPU(X86) || CPU(X86_64)
8105OPGEN_RETURN(true);
8106#endif
8107break;
8108break;
8109default:
8110break;
8111}
8112break;
8113default:
8114break;
8115}
8116break;
8117default:
8118break;
8119}
8120break;
8121case Opcode::AtomicXchg64:
8122switch (sizeof...(Arguments)) {
8123case 2:
8124switch (opgenHiddenPtrIdentity(kinds)[0]) {
8125case Arg::Tmp:
8126switch (opgenHiddenPtrIdentity(kinds)[1]) {
8127case Arg::Addr:
8128case Arg::Stack:
8129case Arg::CallArg:
8130#if CPU(X86_64)
8131OPGEN_RETURN(true);
8132#endif
8133break;
8134break;
8135case Arg::Index:
8136#if CPU(X86_64)
8137OPGEN_RETURN(true);
8138#endif
8139break;
8140break;
8141default:
8142break;
8143}
8144break;
8145default:
8146break;
8147}
8148break;
8149default:
8150break;
8151}
8152break;
8153case Opcode::LoadLink8:
8154switch (sizeof...(Arguments)) {
8155case 2:
8156switch (opgenHiddenPtrIdentity(kinds)[0]) {
8157case Arg::SimpleAddr:
8158switch (opgenHiddenPtrIdentity(kinds)[1]) {
8159case Arg::Tmp:
8160#if CPU(ARM64)
8161OPGEN_RETURN(true);
8162#endif
8163break;
8164break;
8165default:
8166break;
8167}
8168break;
8169default:
8170break;
8171}
8172break;
8173default:
8174break;
8175}
8176break;
8177case Opcode::LoadLinkAcq8:
8178switch (sizeof...(Arguments)) {
8179case 2:
8180switch (opgenHiddenPtrIdentity(kinds)[0]) {
8181case Arg::SimpleAddr:
8182switch (opgenHiddenPtrIdentity(kinds)[1]) {
8183case Arg::Tmp:
8184#if CPU(ARM64)
8185OPGEN_RETURN(true);
8186#endif
8187break;
8188break;
8189default:
8190break;
8191}
8192break;
8193default:
8194break;
8195}
8196break;
8197default:
8198break;
8199}
8200break;
8201case Opcode::StoreCond8:
8202switch (sizeof...(Arguments)) {
8203case 3:
8204switch (opgenHiddenPtrIdentity(kinds)[0]) {
8205case Arg::Tmp:
8206switch (opgenHiddenPtrIdentity(kinds)[1]) {
8207case Arg::SimpleAddr:
8208switch (opgenHiddenPtrIdentity(kinds)[2]) {
8209case Arg::Tmp:
8210#if CPU(ARM64)
8211OPGEN_RETURN(true);
8212#endif
8213break;
8214break;
8215default:
8216break;
8217}
8218break;
8219default:
8220break;
8221}
8222break;
8223default:
8224break;
8225}
8226break;
8227default:
8228break;
8229}
8230break;
8231case Opcode::StoreCondRel8:
8232switch (sizeof...(Arguments)) {
8233case 3:
8234switch (opgenHiddenPtrIdentity(kinds)[0]) {
8235case Arg::Tmp:
8236switch (opgenHiddenPtrIdentity(kinds)[1]) {
8237case Arg::SimpleAddr:
8238switch (opgenHiddenPtrIdentity(kinds)[2]) {
8239case Arg::Tmp:
8240#if CPU(ARM64)
8241OPGEN_RETURN(true);
8242#endif
8243break;
8244break;
8245default:
8246break;
8247}
8248break;
8249default:
8250break;
8251}
8252break;
8253default:
8254break;
8255}
8256break;
8257default:
8258break;
8259}
8260break;
8261case Opcode::LoadLink16:
8262switch (sizeof...(Arguments)) {
8263case 2:
8264switch (opgenHiddenPtrIdentity(kinds)[0]) {
8265case Arg::SimpleAddr:
8266switch (opgenHiddenPtrIdentity(kinds)[1]) {
8267case Arg::Tmp:
8268#if CPU(ARM64)
8269OPGEN_RETURN(true);
8270#endif
8271break;
8272break;
8273default:
8274break;
8275}
8276break;
8277default:
8278break;
8279}
8280break;
8281default:
8282break;
8283}
8284break;
8285case Opcode::LoadLinkAcq16:
8286switch (sizeof...(Arguments)) {
8287case 2:
8288switch (opgenHiddenPtrIdentity(kinds)[0]) {
8289case Arg::SimpleAddr:
8290switch (opgenHiddenPtrIdentity(kinds)[1]) {
8291case Arg::Tmp:
8292#if CPU(ARM64)
8293OPGEN_RETURN(true);
8294#endif
8295break;
8296break;
8297default:
8298break;
8299}
8300break;
8301default:
8302break;
8303}
8304break;
8305default:
8306break;
8307}
8308break;
8309case Opcode::StoreCond16:
8310switch (sizeof...(Arguments)) {
8311case 3:
8312switch (opgenHiddenPtrIdentity(kinds)[0]) {
8313case Arg::Tmp:
8314switch (opgenHiddenPtrIdentity(kinds)[1]) {
8315case Arg::SimpleAddr:
8316switch (opgenHiddenPtrIdentity(kinds)[2]) {
8317case Arg::Tmp:
8318#if CPU(ARM64)
8319OPGEN_RETURN(true);
8320#endif
8321break;
8322break;
8323default:
8324break;
8325}
8326break;
8327default:
8328break;
8329}
8330break;
8331default:
8332break;
8333}
8334break;
8335default:
8336break;
8337}
8338break;
8339case Opcode::StoreCondRel16:
8340switch (sizeof...(Arguments)) {
8341case 3:
8342switch (opgenHiddenPtrIdentity(kinds)[0]) {
8343case Arg::Tmp:
8344switch (opgenHiddenPtrIdentity(kinds)[1]) {
8345case Arg::SimpleAddr:
8346switch (opgenHiddenPtrIdentity(kinds)[2]) {
8347case Arg::Tmp:
8348#if CPU(ARM64)
8349OPGEN_RETURN(true);
8350#endif
8351break;
8352break;
8353default:
8354break;
8355}
8356break;
8357default:
8358break;
8359}
8360break;
8361default:
8362break;
8363}
8364break;
8365default:
8366break;
8367}
8368break;
8369case Opcode::LoadLink32:
8370switch (sizeof...(Arguments)) {
8371case 2:
8372switch (opgenHiddenPtrIdentity(kinds)[0]) {
8373case Arg::SimpleAddr:
8374switch (opgenHiddenPtrIdentity(kinds)[1]) {
8375case Arg::Tmp:
8376#if CPU(ARM64)
8377OPGEN_RETURN(true);
8378#endif
8379break;
8380break;
8381default:
8382break;
8383}
8384break;
8385default:
8386break;
8387}
8388break;
8389default:
8390break;
8391}
8392break;
8393case Opcode::LoadLinkAcq32:
8394switch (sizeof...(Arguments)) {
8395case 2:
8396switch (opgenHiddenPtrIdentity(kinds)[0]) {
8397case Arg::SimpleAddr:
8398switch (opgenHiddenPtrIdentity(kinds)[1]) {
8399case Arg::Tmp:
8400#if CPU(ARM64)
8401OPGEN_RETURN(true);
8402#endif
8403break;
8404break;
8405default:
8406break;
8407}
8408break;
8409default:
8410break;
8411}
8412break;
8413default:
8414break;
8415}
8416break;
8417case Opcode::StoreCond32:
8418switch (sizeof...(Arguments)) {
8419case 3:
8420switch (opgenHiddenPtrIdentity(kinds)[0]) {
8421case Arg::Tmp:
8422switch (opgenHiddenPtrIdentity(kinds)[1]) {
8423case Arg::SimpleAddr:
8424switch (opgenHiddenPtrIdentity(kinds)[2]) {
8425case Arg::Tmp:
8426#if CPU(ARM64)
8427OPGEN_RETURN(true);
8428#endif
8429break;
8430break;
8431default:
8432break;
8433}
8434break;
8435default:
8436break;
8437}
8438break;
8439default:
8440break;
8441}
8442break;
8443default:
8444break;
8445}
8446break;
8447case Opcode::StoreCondRel32:
8448switch (sizeof...(Arguments)) {
8449case 3:
8450switch (opgenHiddenPtrIdentity(kinds)[0]) {
8451case Arg::Tmp:
8452switch (opgenHiddenPtrIdentity(kinds)[1]) {
8453case Arg::SimpleAddr:
8454switch (opgenHiddenPtrIdentity(kinds)[2]) {
8455case Arg::Tmp:
8456#if CPU(ARM64)
8457OPGEN_RETURN(true);
8458#endif
8459break;
8460break;
8461default:
8462break;
8463}
8464break;
8465default:
8466break;
8467}
8468break;
8469default:
8470break;
8471}
8472break;
8473default:
8474break;
8475}
8476break;
8477case Opcode::LoadLink64:
8478switch (sizeof...(Arguments)) {
8479case 2:
8480switch (opgenHiddenPtrIdentity(kinds)[0]) {
8481case Arg::SimpleAddr:
8482switch (opgenHiddenPtrIdentity(kinds)[1]) {
8483case Arg::Tmp:
8484#if CPU(ARM64)
8485OPGEN_RETURN(true);
8486#endif
8487break;
8488break;
8489default:
8490break;
8491}
8492break;
8493default:
8494break;
8495}
8496break;
8497default:
8498break;
8499}
8500break;
8501case Opcode::LoadLinkAcq64:
8502switch (sizeof...(Arguments)) {
8503case 2:
8504switch (opgenHiddenPtrIdentity(kinds)[0]) {
8505case Arg::SimpleAddr:
8506switch (opgenHiddenPtrIdentity(kinds)[1]) {
8507case Arg::Tmp:
8508#if CPU(ARM64)
8509OPGEN_RETURN(true);
8510#endif
8511break;
8512break;
8513default:
8514break;
8515}
8516break;
8517default:
8518break;
8519}
8520break;
8521default:
8522break;
8523}
8524break;
8525case Opcode::StoreCond64:
8526switch (sizeof...(Arguments)) {
8527case 3:
8528switch (opgenHiddenPtrIdentity(kinds)[0]) {
8529case Arg::Tmp:
8530switch (opgenHiddenPtrIdentity(kinds)[1]) {
8531case Arg::SimpleAddr:
8532switch (opgenHiddenPtrIdentity(kinds)[2]) {
8533case Arg::Tmp:
8534#if CPU(ARM64)
8535OPGEN_RETURN(true);
8536#endif
8537break;
8538break;
8539default:
8540break;
8541}
8542break;
8543default:
8544break;
8545}
8546break;
8547default:
8548break;
8549}
8550break;
8551default:
8552break;
8553}
8554break;
8555case Opcode::StoreCondRel64:
8556switch (sizeof...(Arguments)) {
8557case 3:
8558switch (opgenHiddenPtrIdentity(kinds)[0]) {
8559case Arg::Tmp:
8560switch (opgenHiddenPtrIdentity(kinds)[1]) {
8561case Arg::SimpleAddr:
8562switch (opgenHiddenPtrIdentity(kinds)[2]) {
8563case Arg::Tmp:
8564#if CPU(ARM64)
8565OPGEN_RETURN(true);
8566#endif
8567break;
8568break;
8569default:
8570break;
8571}
8572break;
8573default:
8574break;
8575}
8576break;
8577default:
8578break;
8579}
8580break;
8581default:
8582break;
8583}
8584break;
8585case Opcode::Depend32:
8586switch (sizeof...(Arguments)) {
8587case 2:
8588switch (opgenHiddenPtrIdentity(kinds)[0]) {
8589case Arg::Tmp:
8590switch (opgenHiddenPtrIdentity(kinds)[1]) {
8591case Arg::Tmp:
8592#if CPU(ARM64)
8593OPGEN_RETURN(true);
8594#endif
8595break;
8596break;
8597default:
8598break;
8599}
8600break;
8601default:
8602break;
8603}
8604break;
8605default:
8606break;
8607}
8608break;
8609case Opcode::Depend64:
8610switch (sizeof...(Arguments)) {
8611case 2:
8612switch (opgenHiddenPtrIdentity(kinds)[0]) {
8613case Arg::Tmp:
8614switch (opgenHiddenPtrIdentity(kinds)[1]) {
8615case Arg::Tmp:
8616#if CPU(ARM64)
8617OPGEN_RETURN(true);
8618#endif
8619break;
8620break;
8621default:
8622break;
8623}
8624break;
8625default:
8626break;
8627}
8628break;
8629default:
8630break;
8631}
8632break;
8633case Opcode::Compare32:
8634switch (sizeof...(Arguments)) {
8635case 4:
8636switch (opgenHiddenPtrIdentity(kinds)[0]) {
8637case Arg::RelCond:
8638switch (opgenHiddenPtrIdentity(kinds)[1]) {
8639case Arg::Tmp:
8640switch (opgenHiddenPtrIdentity(kinds)[2]) {
8641case Arg::Tmp:
8642switch (opgenHiddenPtrIdentity(kinds)[3]) {
8643case Arg::Tmp:
8644OPGEN_RETURN(true);
8645break;
8646break;
8647default:
8648break;
8649}
8650break;
8651case Arg::Imm:
8652switch (opgenHiddenPtrIdentity(kinds)[3]) {
8653case Arg::Tmp:
8654OPGEN_RETURN(true);
8655break;
8656break;
8657default:
8658break;
8659}
8660break;
8661default:
8662break;
8663}
8664break;
8665default:
8666break;
8667}
8668break;
8669default:
8670break;
8671}
8672break;
8673default:
8674break;
8675}
8676break;
8677case Opcode::Compare64:
8678switch (sizeof...(Arguments)) {
8679case 4:
8680switch (opgenHiddenPtrIdentity(kinds)[0]) {
8681case Arg::RelCond:
8682switch (opgenHiddenPtrIdentity(kinds)[1]) {
8683case Arg::Tmp:
8684switch (opgenHiddenPtrIdentity(kinds)[2]) {
8685case Arg::Tmp:
8686switch (opgenHiddenPtrIdentity(kinds)[3]) {
8687case Arg::Tmp:
8688#if CPU(X86_64) || CPU(ARM64)
8689OPGEN_RETURN(true);
8690#endif
8691break;
8692break;
8693default:
8694break;
8695}
8696break;
8697case Arg::Imm:
8698switch (opgenHiddenPtrIdentity(kinds)[3]) {
8699case Arg::Tmp:
8700#if CPU(X86_64)
8701OPGEN_RETURN(true);
8702#endif
8703break;
8704break;
8705default:
8706break;
8707}
8708break;
8709default:
8710break;
8711}
8712break;
8713default:
8714break;
8715}
8716break;
8717default:
8718break;
8719}
8720break;
8721default:
8722break;
8723}
8724break;
8725case Opcode::Test32:
8726switch (sizeof...(Arguments)) {
8727case 4:
8728switch (opgenHiddenPtrIdentity(kinds)[0]) {
8729case Arg::ResCond:
8730switch (opgenHiddenPtrIdentity(kinds)[1]) {
8731case Arg::Addr:
8732case Arg::Stack:
8733case Arg::CallArg:
8734switch (opgenHiddenPtrIdentity(kinds)[2]) {
8735case Arg::Imm:
8736switch (opgenHiddenPtrIdentity(kinds)[3]) {
8737case Arg::Tmp:
8738#if CPU(X86) || CPU(X86_64)
8739OPGEN_RETURN(true);
8740#endif
8741break;
8742break;
8743default:
8744break;
8745}
8746break;
8747default:
8748break;
8749}
8750break;
8751case Arg::Tmp:
8752switch (opgenHiddenPtrIdentity(kinds)[2]) {
8753case Arg::Tmp:
8754switch (opgenHiddenPtrIdentity(kinds)[3]) {
8755case Arg::Tmp:
8756OPGEN_RETURN(true);
8757break;
8758break;
8759default:
8760break;
8761}
8762break;
8763case Arg::BitImm:
8764switch (opgenHiddenPtrIdentity(kinds)[3]) {
8765case Arg::Tmp:
8766OPGEN_RETURN(true);
8767break;
8768break;
8769default:
8770break;
8771}
8772break;
8773default:
8774break;
8775}
8776break;
8777default:
8778break;
8779}
8780break;
8781default:
8782break;
8783}
8784break;
8785default:
8786break;
8787}
8788break;
8789case Opcode::Test64:
8790switch (sizeof...(Arguments)) {
8791case 4:
8792switch (opgenHiddenPtrIdentity(kinds)[0]) {
8793case Arg::ResCond:
8794switch (opgenHiddenPtrIdentity(kinds)[1]) {
8795case Arg::Tmp:
8796switch (opgenHiddenPtrIdentity(kinds)[2]) {
8797case Arg::Imm:
8798switch (opgenHiddenPtrIdentity(kinds)[3]) {
8799case Arg::Tmp:
8800#if CPU(X86_64)
8801OPGEN_RETURN(true);
8802#endif
8803break;
8804break;
8805default:
8806break;
8807}
8808break;
8809case Arg::Tmp:
8810switch (opgenHiddenPtrIdentity(kinds)[3]) {
8811case Arg::Tmp:
8812#if CPU(X86_64) || CPU(ARM64)
8813OPGEN_RETURN(true);
8814#endif
8815break;
8816break;
8817default:
8818break;
8819}
8820break;
8821default:
8822break;
8823}
8824break;
8825default:
8826break;
8827}
8828break;
8829default:
8830break;
8831}
8832break;
8833default:
8834break;
8835}
8836break;
8837case Opcode::CompareDouble:
8838switch (sizeof...(Arguments)) {
8839case 4:
8840switch (opgenHiddenPtrIdentity(kinds)[0]) {
8841case Arg::DoubleCond:
8842switch (opgenHiddenPtrIdentity(kinds)[1]) {
8843case Arg::Tmp:
8844switch (opgenHiddenPtrIdentity(kinds)[2]) {
8845case Arg::Tmp:
8846switch (opgenHiddenPtrIdentity(kinds)[3]) {
8847case Arg::Tmp:
8848OPGEN_RETURN(true);
8849break;
8850break;
8851default:
8852break;
8853}
8854break;
8855default:
8856break;
8857}
8858break;
8859default:
8860break;
8861}
8862break;
8863default:
8864break;
8865}
8866break;
8867default:
8868break;
8869}
8870break;
8871case Opcode::CompareFloat:
8872switch (sizeof...(Arguments)) {
8873case 4:
8874switch (opgenHiddenPtrIdentity(kinds)[0]) {
8875case Arg::DoubleCond:
8876switch (opgenHiddenPtrIdentity(kinds)[1]) {
8877case Arg::Tmp:
8878switch (opgenHiddenPtrIdentity(kinds)[2]) {
8879case Arg::Tmp:
8880switch (opgenHiddenPtrIdentity(kinds)[3]) {
8881case Arg::Tmp:
8882OPGEN_RETURN(true);
8883break;
8884break;
8885default:
8886break;
8887}
8888break;
8889default:
8890break;
8891}
8892break;
8893default:
8894break;
8895}
8896break;
8897default:
8898break;
8899}
8900break;
8901default:
8902break;
8903}
8904break;
8905case Opcode::Branch8:
8906switch (sizeof...(Arguments)) {
8907case 3:
8908switch (opgenHiddenPtrIdentity(kinds)[0]) {
8909case Arg::RelCond:
8910switch (opgenHiddenPtrIdentity(kinds)[1]) {
8911case Arg::Addr:
8912case Arg::Stack:
8913case Arg::CallArg:
8914switch (opgenHiddenPtrIdentity(kinds)[2]) {
8915case Arg::Imm:
8916#if CPU(X86) || CPU(X86_64)
8917OPGEN_RETURN(true);
8918#endif
8919break;
8920break;
8921default:
8922break;
8923}
8924break;
8925case Arg::Index:
8926switch (opgenHiddenPtrIdentity(kinds)[2]) {
8927case Arg::Imm:
8928#if CPU(X86) || CPU(X86_64)
8929OPGEN_RETURN(true);
8930#endif
8931break;
8932break;
8933default:
8934break;
8935}
8936break;
8937default:
8938break;
8939}
8940break;
8941default:
8942break;
8943}
8944break;
8945default:
8946break;
8947}
8948break;
8949case Opcode::Branch32:
8950switch (sizeof...(Arguments)) {
8951case 3:
8952switch (opgenHiddenPtrIdentity(kinds)[0]) {
8953case Arg::RelCond:
8954switch (opgenHiddenPtrIdentity(kinds)[1]) {
8955case Arg::Addr:
8956case Arg::Stack:
8957case Arg::CallArg:
8958switch (opgenHiddenPtrIdentity(kinds)[2]) {
8959case Arg::Imm:
8960#if CPU(X86) || CPU(X86_64)
8961OPGEN_RETURN(true);
8962#endif
8963break;
8964break;
8965case Arg::Tmp:
8966#if CPU(X86) || CPU(X86_64)
8967OPGEN_RETURN(true);
8968#endif
8969break;
8970break;
8971default:
8972break;
8973}
8974break;
8975case Arg::Tmp:
8976switch (opgenHiddenPtrIdentity(kinds)[2]) {
8977case Arg::Tmp:
8978OPGEN_RETURN(true);
8979break;
8980break;
8981case Arg::Imm:
8982OPGEN_RETURN(true);
8983break;
8984break;
8985case Arg::Addr:
8986case Arg::Stack:
8987case Arg::CallArg:
8988#if CPU(X86) || CPU(X86_64)
8989OPGEN_RETURN(true);
8990#endif
8991break;
8992break;
8993default:
8994break;
8995}
8996break;
8997case Arg::Index:
8998switch (opgenHiddenPtrIdentity(kinds)[2]) {
8999case Arg::Imm:
9000#if CPU(X86) || CPU(X86_64)
9001OPGEN_RETURN(true);
9002#endif
9003break;
9004break;
9005default:
9006break;
9007}
9008break;
9009default:
9010break;
9011}
9012break;
9013default:
9014break;
9015}
9016break;
9017default:
9018break;
9019}
9020break;
9021case Opcode::Branch64:
9022switch (sizeof...(Arguments)) {
9023case 3:
9024switch (opgenHiddenPtrIdentity(kinds)[0]) {
9025case Arg::RelCond:
9026switch (opgenHiddenPtrIdentity(kinds)[1]) {
9027case Arg::Tmp:
9028switch (opgenHiddenPtrIdentity(kinds)[2]) {
9029case Arg::Tmp:
9030#if CPU(X86_64) || CPU(ARM64)
9031OPGEN_RETURN(true);
9032#endif
9033break;
9034break;
9035case Arg::Imm:
9036#if CPU(X86_64) || CPU(ARM64)
9037OPGEN_RETURN(true);
9038#endif
9039break;
9040break;
9041case Arg::Addr:
9042case Arg::Stack:
9043case Arg::CallArg:
9044#if CPU(X86_64)
9045OPGEN_RETURN(true);
9046#endif
9047break;
9048break;
9049default:
9050break;
9051}
9052break;
9053case Arg::Addr:
9054case Arg::Stack:
9055case Arg::CallArg:
9056switch (opgenHiddenPtrIdentity(kinds)[2]) {
9057case Arg::Tmp:
9058#if CPU(X86_64)
9059OPGEN_RETURN(true);
9060#endif
9061break;
9062break;
9063case Arg::Imm:
9064#if CPU(X86_64)
9065OPGEN_RETURN(true);
9066#endif
9067break;
9068break;
9069default:
9070break;
9071}
9072break;
9073case Arg::Index:
9074switch (opgenHiddenPtrIdentity(kinds)[2]) {
9075case Arg::Tmp:
9076#if CPU(X86_64)
9077OPGEN_RETURN(true);
9078#endif
9079break;
9080break;
9081default:
9082break;
9083}
9084break;
9085default:
9086break;
9087}
9088break;
9089default:
9090break;
9091}
9092break;
9093default:
9094break;
9095}
9096break;
9097case Opcode::BranchTest8:
9098switch (sizeof...(Arguments)) {
9099case 3:
9100switch (opgenHiddenPtrIdentity(kinds)[0]) {
9101case Arg::ResCond:
9102switch (opgenHiddenPtrIdentity(kinds)[1]) {
9103case Arg::Addr:
9104case Arg::Stack:
9105case Arg::CallArg:
9106switch (opgenHiddenPtrIdentity(kinds)[2]) {
9107case Arg::BitImm:
9108#if CPU(X86) || CPU(X86_64)
9109OPGEN_RETURN(true);
9110#endif
9111break;
9112break;
9113default:
9114break;
9115}
9116break;
9117case Arg::Index:
9118switch (opgenHiddenPtrIdentity(kinds)[2]) {
9119case Arg::BitImm:
9120#if CPU(X86) || CPU(X86_64)
9121OPGEN_RETURN(true);
9122#endif
9123break;
9124break;
9125default:
9126break;
9127}
9128break;
9129default:
9130break;
9131}
9132break;
9133default:
9134break;
9135}
9136break;
9137default:
9138break;
9139}
9140break;
9141case Opcode::BranchTest32:
9142switch (sizeof...(Arguments)) {
9143case 3:
9144switch (opgenHiddenPtrIdentity(kinds)[0]) {
9145case Arg::ResCond:
9146switch (opgenHiddenPtrIdentity(kinds)[1]) {
9147case Arg::Tmp:
9148switch (opgenHiddenPtrIdentity(kinds)[2]) {
9149case Arg::Tmp:
9150OPGEN_RETURN(true);
9151break;
9152break;
9153case Arg::BitImm:
9154OPGEN_RETURN(true);
9155break;
9156break;
9157default:
9158break;
9159}
9160break;
9161case Arg::Addr:
9162case Arg::Stack:
9163case Arg::CallArg:
9164switch (opgenHiddenPtrIdentity(kinds)[2]) {
9165case Arg::BitImm:
9166#if CPU(X86) || CPU(X86_64)
9167OPGEN_RETURN(true);
9168#endif
9169break;
9170break;
9171default:
9172break;
9173}
9174break;
9175case Arg::Index:
9176switch (opgenHiddenPtrIdentity(kinds)[2]) {
9177case Arg::BitImm:
9178#if CPU(X86) || CPU(X86_64)
9179OPGEN_RETURN(true);
9180#endif
9181break;
9182break;
9183default:
9184break;
9185}
9186break;
9187default:
9188break;
9189}
9190break;
9191default:
9192break;
9193}
9194break;
9195default:
9196break;
9197}
9198break;
9199case Opcode::BranchTest64:
9200switch (sizeof...(Arguments)) {
9201case 3:
9202switch (opgenHiddenPtrIdentity(kinds)[0]) {
9203case Arg::ResCond:
9204switch (opgenHiddenPtrIdentity(kinds)[1]) {
9205case Arg::Tmp:
9206switch (opgenHiddenPtrIdentity(kinds)[2]) {
9207case Arg::Tmp:
9208#if CPU(X86_64) || CPU(ARM64)
9209OPGEN_RETURN(true);
9210#endif
9211break;
9212break;
9213#if USE(JSVALUE64)
9214case Arg::BitImm64:
9215#if CPU(ARM64)
9216OPGEN_RETURN(true);
9217#endif
9218break;
9219break;
9220#endif // USE(JSVALUE64)
9221case Arg::BitImm:
9222#if CPU(X86_64)
9223OPGEN_RETURN(true);
9224#endif
9225break;
9226break;
9227default:
9228break;
9229}
9230break;
9231case Arg::Addr:
9232case Arg::Stack:
9233case Arg::CallArg:
9234switch (opgenHiddenPtrIdentity(kinds)[2]) {
9235case Arg::BitImm:
9236#if CPU(X86_64)
9237OPGEN_RETURN(true);
9238#endif
9239break;
9240break;
9241case Arg::Tmp:
9242#if CPU(X86_64)
9243OPGEN_RETURN(true);
9244#endif
9245break;
9246break;
9247default:
9248break;
9249}
9250break;
9251case Arg::Index:
9252switch (opgenHiddenPtrIdentity(kinds)[2]) {
9253case Arg::BitImm:
9254#if CPU(X86_64)
9255OPGEN_RETURN(true);
9256#endif
9257break;
9258break;
9259default:
9260break;
9261}
9262break;
9263default:
9264break;
9265}
9266break;
9267default:
9268break;
9269}
9270break;
9271default:
9272break;
9273}
9274break;
9275case Opcode::BranchTestBit64:
9276switch (sizeof...(Arguments)) {
9277case 3:
9278switch (opgenHiddenPtrIdentity(kinds)[0]) {
9279case Arg::ResCond:
9280switch (opgenHiddenPtrIdentity(kinds)[1]) {
9281case Arg::Tmp:
9282switch (opgenHiddenPtrIdentity(kinds)[2]) {
9283case Arg::Imm:
9284#if CPU(X86_64)
9285OPGEN_RETURN(true);
9286#endif
9287break;
9288break;
9289case Arg::Tmp:
9290#if CPU(X86_64)
9291OPGEN_RETURN(true);
9292#endif
9293break;
9294break;
9295default:
9296break;
9297}
9298break;
9299case Arg::Addr:
9300case Arg::Stack:
9301case Arg::CallArg:
9302switch (opgenHiddenPtrIdentity(kinds)[2]) {
9303case Arg::Imm:
9304#if CPU(X86_64)
9305OPGEN_RETURN(true);
9306#endif
9307break;
9308break;
9309default:
9310break;
9311}
9312break;
9313default:
9314break;
9315}
9316break;
9317default:
9318break;
9319}
9320break;
9321default:
9322break;
9323}
9324break;
9325case Opcode::BranchTestBit32:
9326switch (sizeof...(Arguments)) {
9327case 3:
9328switch (opgenHiddenPtrIdentity(kinds)[0]) {
9329case Arg::ResCond:
9330switch (opgenHiddenPtrIdentity(kinds)[1]) {
9331case Arg::Tmp:
9332switch (opgenHiddenPtrIdentity(kinds)[2]) {
9333case Arg::Imm:
9334#if CPU(X86) || CPU(X86_64)
9335OPGEN_RETURN(true);
9336#endif
9337break;
9338break;
9339case Arg::Tmp:
9340#if CPU(X86) || CPU(X86_64)
9341OPGEN_RETURN(true);
9342#endif
9343break;
9344break;
9345default:
9346break;
9347}
9348break;
9349case Arg::Addr:
9350case Arg::Stack:
9351case Arg::CallArg:
9352switch (opgenHiddenPtrIdentity(kinds)[2]) {
9353case Arg::Imm:
9354#if CPU(X86) || CPU(X86_64)
9355OPGEN_RETURN(true);
9356#endif
9357break;
9358break;
9359default:
9360break;
9361}
9362break;
9363default:
9364break;
9365}
9366break;
9367default:
9368break;
9369}
9370break;
9371default:
9372break;
9373}
9374break;
9375case Opcode::BranchDouble:
9376switch (sizeof...(Arguments)) {
9377case 3:
9378switch (opgenHiddenPtrIdentity(kinds)[0]) {
9379case Arg::DoubleCond:
9380switch (opgenHiddenPtrIdentity(kinds)[1]) {
9381case Arg::Tmp:
9382switch (opgenHiddenPtrIdentity(kinds)[2]) {
9383case Arg::Tmp:
9384OPGEN_RETURN(true);
9385break;
9386break;
9387default:
9388break;
9389}
9390break;
9391default:
9392break;
9393}
9394break;
9395default:
9396break;
9397}
9398break;
9399default:
9400break;
9401}
9402break;
9403case Opcode::BranchFloat:
9404switch (sizeof...(Arguments)) {
9405case 3:
9406switch (opgenHiddenPtrIdentity(kinds)[0]) {
9407case Arg::DoubleCond:
9408switch (opgenHiddenPtrIdentity(kinds)[1]) {
9409case Arg::Tmp:
9410switch (opgenHiddenPtrIdentity(kinds)[2]) {
9411case Arg::Tmp:
9412OPGEN_RETURN(true);
9413break;
9414break;
9415default:
9416break;
9417}
9418break;
9419default:
9420break;
9421}
9422break;
9423default:
9424break;
9425}
9426break;
9427default:
9428break;
9429}
9430break;
9431case Opcode::BranchAdd32:
9432switch (sizeof...(Arguments)) {
9433case 4:
9434switch (opgenHiddenPtrIdentity(kinds)[0]) {
9435case Arg::ResCond:
9436switch (opgenHiddenPtrIdentity(kinds)[1]) {
9437case Arg::Tmp:
9438switch (opgenHiddenPtrIdentity(kinds)[2]) {
9439case Arg::Tmp:
9440switch (opgenHiddenPtrIdentity(kinds)[3]) {
9441case Arg::Tmp:
9442OPGEN_RETURN(true);
9443break;
9444break;
9445default:
9446break;
9447}
9448break;
9449case Arg::Addr:
9450case Arg::Stack:
9451case Arg::CallArg:
9452switch (opgenHiddenPtrIdentity(kinds)[3]) {
9453case Arg::Tmp:
9454#if CPU(X86) || CPU(X86_64)
9455OPGEN_RETURN(true);
9456#endif
9457break;
9458break;
9459default:
9460break;
9461}
9462break;
9463default:
9464break;
9465}
9466break;
9467case Arg::Addr:
9468case Arg::Stack:
9469case Arg::CallArg:
9470switch (opgenHiddenPtrIdentity(kinds)[2]) {
9471case Arg::Tmp:
9472switch (opgenHiddenPtrIdentity(kinds)[3]) {
9473case Arg::Tmp:
9474#if CPU(X86) || CPU(X86_64)
9475OPGEN_RETURN(true);
9476#endif
9477break;
9478break;
9479default:
9480break;
9481}
9482break;
9483default:
9484break;
9485}
9486break;
9487default:
9488break;
9489}
9490break;
9491default:
9492break;
9493}
9494break;
9495case 3:
9496switch (opgenHiddenPtrIdentity(kinds)[0]) {
9497case Arg::ResCond:
9498switch (opgenHiddenPtrIdentity(kinds)[1]) {
9499case Arg::Tmp:
9500switch (opgenHiddenPtrIdentity(kinds)[2]) {
9501case Arg::Tmp:
9502OPGEN_RETURN(true);
9503break;
9504break;
9505case Arg::Addr:
9506case Arg::Stack:
9507case Arg::CallArg:
9508#if CPU(X86) || CPU(X86_64)
9509OPGEN_RETURN(true);
9510#endif
9511break;
9512break;
9513default:
9514break;
9515}
9516break;
9517case Arg::Imm:
9518switch (opgenHiddenPtrIdentity(kinds)[2]) {
9519case Arg::Tmp:
9520OPGEN_RETURN(true);
9521break;
9522break;
9523case Arg::Addr:
9524case Arg::Stack:
9525case Arg::CallArg:
9526#if CPU(X86) || CPU(X86_64)
9527OPGEN_RETURN(true);
9528#endif
9529break;
9530break;
9531default:
9532break;
9533}
9534break;
9535case Arg::Addr:
9536case Arg::Stack:
9537case Arg::CallArg:
9538switch (opgenHiddenPtrIdentity(kinds)[2]) {
9539case Arg::Tmp:
9540#if CPU(X86) || CPU(X86_64)
9541OPGEN_RETURN(true);
9542#endif
9543break;
9544break;
9545default:
9546break;
9547}
9548break;
9549default:
9550break;
9551}
9552break;
9553default:
9554break;
9555}
9556break;
9557default:
9558break;
9559}
9560break;
9561case Opcode::BranchAdd64:
9562switch (sizeof...(Arguments)) {
9563case 4:
9564switch (opgenHiddenPtrIdentity(kinds)[0]) {
9565case Arg::ResCond:
9566switch (opgenHiddenPtrIdentity(kinds)[1]) {
9567case Arg::Tmp:
9568switch (opgenHiddenPtrIdentity(kinds)[2]) {
9569case Arg::Tmp:
9570switch (opgenHiddenPtrIdentity(kinds)[3]) {
9571case Arg::Tmp:
9572OPGEN_RETURN(true);
9573break;
9574break;
9575default:
9576break;
9577}
9578break;
9579case Arg::Addr:
9580case Arg::Stack:
9581case Arg::CallArg:
9582switch (opgenHiddenPtrIdentity(kinds)[3]) {
9583case Arg::Tmp:
9584#if CPU(X86) || CPU(X86_64)
9585OPGEN_RETURN(true);
9586#endif
9587break;
9588break;
9589default:
9590break;
9591}
9592break;
9593default:
9594break;
9595}
9596break;
9597case Arg::Addr:
9598case Arg::Stack:
9599case Arg::CallArg:
9600switch (opgenHiddenPtrIdentity(kinds)[2]) {
9601case Arg::Tmp:
9602switch (opgenHiddenPtrIdentity(kinds)[3]) {
9603case Arg::Tmp:
9604#if CPU(X86) || CPU(X86_64)
9605OPGEN_RETURN(true);
9606#endif
9607break;
9608break;
9609default:
9610break;
9611}
9612break;
9613default:
9614break;
9615}
9616break;
9617default:
9618break;
9619}
9620break;
9621default:
9622break;
9623}
9624break;
9625case 3:
9626switch (opgenHiddenPtrIdentity(kinds)[0]) {
9627case Arg::ResCond:
9628switch (opgenHiddenPtrIdentity(kinds)[1]) {
9629case Arg::Imm:
9630switch (opgenHiddenPtrIdentity(kinds)[2]) {
9631case Arg::Tmp:
9632#if CPU(X86_64) || CPU(ARM64)
9633OPGEN_RETURN(true);
9634#endif
9635break;
9636break;
9637default:
9638break;
9639}
9640break;
9641case Arg::Tmp:
9642switch (opgenHiddenPtrIdentity(kinds)[2]) {
9643case Arg::Tmp:
9644#if CPU(X86_64) || CPU(ARM64)
9645OPGEN_RETURN(true);
9646#endif
9647break;
9648break;
9649default:
9650break;
9651}
9652break;
9653case Arg::Addr:
9654case Arg::Stack:
9655case Arg::CallArg:
9656switch (opgenHiddenPtrIdentity(kinds)[2]) {
9657case Arg::Tmp:
9658#if CPU(X86_64)
9659OPGEN_RETURN(true);
9660#endif
9661break;
9662break;
9663default:
9664break;
9665}
9666break;
9667default:
9668break;
9669}
9670break;
9671default:
9672break;
9673}
9674break;
9675default:
9676break;
9677}
9678break;
9679case Opcode::BranchMul32:
9680switch (sizeof...(Arguments)) {
9681case 3:
9682switch (opgenHiddenPtrIdentity(kinds)[0]) {
9683case Arg::ResCond:
9684switch (opgenHiddenPtrIdentity(kinds)[1]) {
9685case Arg::Tmp:
9686switch (opgenHiddenPtrIdentity(kinds)[2]) {
9687case Arg::Tmp:
9688#if CPU(X86) || CPU(X86_64)
9689OPGEN_RETURN(true);
9690#endif
9691break;
9692break;
9693default:
9694break;
9695}
9696break;
9697case Arg::Addr:
9698case Arg::Stack:
9699case Arg::CallArg:
9700switch (opgenHiddenPtrIdentity(kinds)[2]) {
9701case Arg::Tmp:
9702#if CPU(X86) || CPU(X86_64)
9703OPGEN_RETURN(true);
9704#endif
9705break;
9706break;
9707default:
9708break;
9709}
9710break;
9711default:
9712break;
9713}
9714break;
9715default:
9716break;
9717}
9718break;
9719case 4:
9720switch (opgenHiddenPtrIdentity(kinds)[0]) {
9721case Arg::ResCond:
9722switch (opgenHiddenPtrIdentity(kinds)[1]) {
9723case Arg::Tmp:
9724switch (opgenHiddenPtrIdentity(kinds)[2]) {
9725case Arg::Imm:
9726switch (opgenHiddenPtrIdentity(kinds)[3]) {
9727case Arg::Tmp:
9728#if CPU(X86) || CPU(X86_64)
9729OPGEN_RETURN(true);
9730#endif
9731break;
9732break;
9733default:
9734break;
9735}
9736break;
9737default:
9738break;
9739}
9740break;
9741default:
9742break;
9743}
9744break;
9745default:
9746break;
9747}
9748break;
9749case 6:
9750switch (opgenHiddenPtrIdentity(kinds)[0]) {
9751case Arg::ResCond:
9752switch (opgenHiddenPtrIdentity(kinds)[1]) {
9753case Arg::Tmp:
9754switch (opgenHiddenPtrIdentity(kinds)[2]) {
9755case Arg::Tmp:
9756switch (opgenHiddenPtrIdentity(kinds)[3]) {
9757case Arg::Tmp:
9758switch (opgenHiddenPtrIdentity(kinds)[4]) {
9759case Arg::Tmp:
9760switch (opgenHiddenPtrIdentity(kinds)[5]) {
9761case Arg::Tmp:
9762#if CPU(ARM64)
9763OPGEN_RETURN(true);
9764#endif
9765break;
9766break;
9767default:
9768break;
9769}
9770break;
9771default:
9772break;
9773}
9774break;
9775default:
9776break;
9777}
9778break;
9779default:
9780break;
9781}
9782break;
9783default:
9784break;
9785}
9786break;
9787default:
9788break;
9789}
9790break;
9791default:
9792break;
9793}
9794break;
9795case Opcode::BranchMul64:
9796switch (sizeof...(Arguments)) {
9797case 3:
9798switch (opgenHiddenPtrIdentity(kinds)[0]) {
9799case Arg::ResCond:
9800switch (opgenHiddenPtrIdentity(kinds)[1]) {
9801case Arg::Tmp:
9802switch (opgenHiddenPtrIdentity(kinds)[2]) {
9803case Arg::Tmp:
9804#if CPU(X86_64)
9805OPGEN_RETURN(true);
9806#endif
9807break;
9808break;
9809default:
9810break;
9811}
9812break;
9813default:
9814break;
9815}
9816break;
9817default:
9818break;
9819}
9820break;
9821case 6:
9822switch (opgenHiddenPtrIdentity(kinds)[0]) {
9823case Arg::ResCond:
9824switch (opgenHiddenPtrIdentity(kinds)[1]) {
9825case Arg::Tmp:
9826switch (opgenHiddenPtrIdentity(kinds)[2]) {
9827case Arg::Tmp:
9828switch (opgenHiddenPtrIdentity(kinds)[3]) {
9829case Arg::Tmp:
9830switch (opgenHiddenPtrIdentity(kinds)[4]) {
9831case Arg::Tmp:
9832switch (opgenHiddenPtrIdentity(kinds)[5]) {
9833case Arg::Tmp:
9834#if CPU(ARM64)
9835OPGEN_RETURN(true);
9836#endif
9837break;
9838break;
9839default:
9840break;
9841}
9842break;
9843default:
9844break;
9845}
9846break;
9847default:
9848break;
9849}
9850break;
9851default:
9852break;
9853}
9854break;
9855default:
9856break;
9857}
9858break;
9859default:
9860break;
9861}
9862break;
9863default:
9864break;
9865}
9866break;
9867case Opcode::BranchSub32:
9868switch (sizeof...(Arguments)) {
9869case 3:
9870switch (opgenHiddenPtrIdentity(kinds)[0]) {
9871case Arg::ResCond:
9872switch (opgenHiddenPtrIdentity(kinds)[1]) {
9873case Arg::Tmp:
9874switch (opgenHiddenPtrIdentity(kinds)[2]) {
9875case Arg::Tmp:
9876OPGEN_RETURN(true);
9877break;
9878break;
9879case Arg::Addr:
9880case Arg::Stack:
9881case Arg::CallArg:
9882#if CPU(X86) || CPU(X86_64)
9883OPGEN_RETURN(true);
9884#endif
9885break;
9886break;
9887default:
9888break;
9889}
9890break;
9891case Arg::Imm:
9892switch (opgenHiddenPtrIdentity(kinds)[2]) {
9893case Arg::Tmp:
9894OPGEN_RETURN(true);
9895break;
9896break;
9897case Arg::Addr:
9898case Arg::Stack:
9899case Arg::CallArg:
9900#if CPU(X86) || CPU(X86_64)
9901OPGEN_RETURN(true);
9902#endif
9903break;
9904break;
9905default:
9906break;
9907}
9908break;
9909case Arg::Addr:
9910case Arg::Stack:
9911case Arg::CallArg:
9912switch (opgenHiddenPtrIdentity(kinds)[2]) {
9913case Arg::Tmp:
9914#if CPU(X86) || CPU(X86_64)
9915OPGEN_RETURN(true);
9916#endif
9917break;
9918break;
9919default:
9920break;
9921}
9922break;
9923default:
9924break;
9925}
9926break;
9927default:
9928break;
9929}
9930break;
9931default:
9932break;
9933}
9934break;
9935case Opcode::BranchSub64:
9936switch (sizeof...(Arguments)) {
9937case 3:
9938switch (opgenHiddenPtrIdentity(kinds)[0]) {
9939case Arg::ResCond:
9940switch (opgenHiddenPtrIdentity(kinds)[1]) {
9941case Arg::Imm:
9942switch (opgenHiddenPtrIdentity(kinds)[2]) {
9943case Arg::Tmp:
9944#if CPU(X86_64) || CPU(ARM64)
9945OPGEN_RETURN(true);
9946#endif
9947break;
9948break;
9949default:
9950break;
9951}
9952break;
9953case Arg::Tmp:
9954switch (opgenHiddenPtrIdentity(kinds)[2]) {
9955case Arg::Tmp:
9956#if CPU(X86_64) || CPU(ARM64)
9957OPGEN_RETURN(true);
9958#endif
9959break;
9960break;
9961default:
9962break;
9963}
9964break;
9965default:
9966break;
9967}
9968break;
9969default:
9970break;
9971}
9972break;
9973default:
9974break;
9975}
9976break;
9977case Opcode::BranchNeg32:
9978switch (sizeof...(Arguments)) {
9979case 2:
9980switch (opgenHiddenPtrIdentity(kinds)[0]) {
9981case Arg::ResCond:
9982switch (opgenHiddenPtrIdentity(kinds)[1]) {
9983case Arg::Tmp:
9984OPGEN_RETURN(true);
9985break;
9986break;
9987default:
9988break;
9989}
9990break;
9991default:
9992break;
9993}
9994break;
9995default:
9996break;
9997}
9998break;
9999case Opcode::BranchNeg64:
10000switch (sizeof...(Arguments)) {
10001case 2:
10002switch (opgenHiddenPtrIdentity(kinds)[0]) {
10003case Arg::ResCond:
10004switch (opgenHiddenPtrIdentity(kinds)[1]) {
10005case Arg::Tmp:
10006#if CPU(X86_64) || CPU(ARM64)
10007OPGEN_RETURN(true);
10008#endif
10009break;
10010break;
10011default:
10012break;
10013}
10014break;
10015default:
10016break;
10017}
10018break;
10019default:
10020break;
10021}
10022break;
10023case Opcode::MoveConditionally32:
10024switch (sizeof...(Arguments)) {
10025case 5:
10026switch (opgenHiddenPtrIdentity(kinds)[0]) {
10027case Arg::RelCond:
10028switch (opgenHiddenPtrIdentity(kinds)[1]) {
10029case Arg::Tmp:
10030switch (opgenHiddenPtrIdentity(kinds)[2]) {
10031case Arg::Tmp:
10032switch (opgenHiddenPtrIdentity(kinds)[3]) {
10033case Arg::Tmp:
10034switch (opgenHiddenPtrIdentity(kinds)[4]) {
10035case Arg::Tmp:
10036OPGEN_RETURN(true);
10037break;
10038break;
10039default:
10040break;
10041}
10042break;
10043default:
10044break;
10045}
10046break;
10047default:
10048break;
10049}
10050break;
10051default:
10052break;
10053}
10054break;
10055default:
10056break;
10057}
10058break;
10059case 6:
10060switch (opgenHiddenPtrIdentity(kinds)[0]) {
10061case Arg::RelCond:
10062switch (opgenHiddenPtrIdentity(kinds)[1]) {
10063case Arg::Tmp:
10064switch (opgenHiddenPtrIdentity(kinds)[2]) {
10065case Arg::Tmp:
10066switch (opgenHiddenPtrIdentity(kinds)[3]) {
10067case Arg::Tmp:
10068switch (opgenHiddenPtrIdentity(kinds)[4]) {
10069case Arg::Tmp:
10070switch (opgenHiddenPtrIdentity(kinds)[5]) {
10071case Arg::Tmp:
10072OPGEN_RETURN(true);
10073break;
10074break;
10075default:
10076break;
10077}
10078break;
10079default:
10080break;
10081}
10082break;
10083default:
10084break;
10085}
10086break;
10087case Arg::Imm:
10088switch (opgenHiddenPtrIdentity(kinds)[3]) {
10089case Arg::Tmp:
10090switch (opgenHiddenPtrIdentity(kinds)[4]) {
10091case Arg::Tmp:
10092switch (opgenHiddenPtrIdentity(kinds)[5]) {
10093case Arg::Tmp:
10094OPGEN_RETURN(true);
10095break;
10096break;
10097default:
10098break;
10099}
10100break;
10101default:
10102break;
10103}
10104break;
10105default:
10106break;
10107}
10108break;
10109default:
10110break;
10111}
10112break;
10113default:
10114break;
10115}
10116break;
10117default:
10118break;
10119}
10120break;
10121default:
10122break;
10123}
10124break;
10125case Opcode::MoveConditionally64:
10126switch (sizeof...(Arguments)) {
10127case 5:
10128switch (opgenHiddenPtrIdentity(kinds)[0]) {
10129case Arg::RelCond:
10130switch (opgenHiddenPtrIdentity(kinds)[1]) {
10131case Arg::Tmp:
10132switch (opgenHiddenPtrIdentity(kinds)[2]) {
10133case Arg::Tmp:
10134switch (opgenHiddenPtrIdentity(kinds)[3]) {
10135case Arg::Tmp:
10136switch (opgenHiddenPtrIdentity(kinds)[4]) {
10137case Arg::Tmp:
10138#if CPU(X86_64) || CPU(ARM64)
10139OPGEN_RETURN(true);
10140#endif
10141break;
10142break;
10143default:
10144break;
10145}
10146break;
10147default:
10148break;
10149}
10150break;
10151default:
10152break;
10153}
10154break;
10155default:
10156break;
10157}
10158break;
10159default:
10160break;
10161}
10162break;
10163case 6:
10164switch (opgenHiddenPtrIdentity(kinds)[0]) {
10165case Arg::RelCond:
10166switch (opgenHiddenPtrIdentity(kinds)[1]) {
10167case Arg::Tmp:
10168switch (opgenHiddenPtrIdentity(kinds)[2]) {
10169case Arg::Tmp:
10170switch (opgenHiddenPtrIdentity(kinds)[3]) {
10171case Arg::Tmp:
10172switch (opgenHiddenPtrIdentity(kinds)[4]) {
10173case Arg::Tmp:
10174switch (opgenHiddenPtrIdentity(kinds)[5]) {
10175case Arg::Tmp:
10176#if CPU(X86_64) || CPU(ARM64)
10177OPGEN_RETURN(true);
10178#endif
10179break;
10180break;
10181default:
10182break;
10183}
10184break;
10185default:
10186break;
10187}
10188break;
10189default:
10190break;
10191}
10192break;
10193case Arg::Imm:
10194switch (opgenHiddenPtrIdentity(kinds)[3]) {
10195case Arg::Tmp:
10196switch (opgenHiddenPtrIdentity(kinds)[4]) {
10197case Arg::Tmp:
10198switch (opgenHiddenPtrIdentity(kinds)[5]) {
10199case Arg::Tmp:
10200#if CPU(X86_64) || CPU(ARM64)
10201OPGEN_RETURN(true);
10202#endif
10203break;
10204break;
10205default:
10206break;
10207}
10208break;
10209default:
10210break;
10211}
10212break;
10213default:
10214break;
10215}
10216break;
10217default:
10218break;
10219}
10220break;
10221default:
10222break;
10223}
10224break;
10225default:
10226break;
10227}
10228break;
10229default:
10230break;
10231}
10232break;
10233case Opcode::MoveConditionallyTest32:
10234switch (sizeof...(Arguments)) {
10235case 5:
10236switch (opgenHiddenPtrIdentity(kinds)[0]) {
10237case Arg::ResCond:
10238switch (opgenHiddenPtrIdentity(kinds)[1]) {
10239case Arg::Tmp:
10240switch (opgenHiddenPtrIdentity(kinds)[2]) {
10241case Arg::Tmp:
10242switch (opgenHiddenPtrIdentity(kinds)[3]) {
10243case Arg::Tmp:
10244switch (opgenHiddenPtrIdentity(kinds)[4]) {
10245case Arg::Tmp:
10246OPGEN_RETURN(true);
10247break;
10248break;
10249default:
10250break;
10251}
10252break;
10253default:
10254break;
10255}
10256break;
10257case Arg::Imm:
10258switch (opgenHiddenPtrIdentity(kinds)[3]) {
10259case Arg::Tmp:
10260switch (opgenHiddenPtrIdentity(kinds)[4]) {
10261case Arg::Tmp:
10262#if CPU(X86) || CPU(X86_64)
10263OPGEN_RETURN(true);
10264#endif
10265break;
10266break;
10267default:
10268break;
10269}
10270break;
10271default:
10272break;
10273}
10274break;
10275default:
10276break;
10277}
10278break;
10279default:
10280break;
10281}
10282break;
10283default:
10284break;
10285}
10286break;
10287case 6:
10288switch (opgenHiddenPtrIdentity(kinds)[0]) {
10289case Arg::ResCond:
10290switch (opgenHiddenPtrIdentity(kinds)[1]) {
10291case Arg::Tmp:
10292switch (opgenHiddenPtrIdentity(kinds)[2]) {
10293case Arg::Tmp:
10294switch (opgenHiddenPtrIdentity(kinds)[3]) {
10295case Arg::Tmp:
10296switch (opgenHiddenPtrIdentity(kinds)[4]) {
10297case Arg::Tmp:
10298switch (opgenHiddenPtrIdentity(kinds)[5]) {
10299case Arg::Tmp:
10300OPGEN_RETURN(true);
10301break;
10302break;
10303default:
10304break;
10305}
10306break;
10307default:
10308break;
10309}
10310break;
10311default:
10312break;
10313}
10314break;
10315case Arg::BitImm:
10316switch (opgenHiddenPtrIdentity(kinds)[3]) {
10317case Arg::Tmp:
10318switch (opgenHiddenPtrIdentity(kinds)[4]) {
10319case Arg::Tmp:
10320switch (opgenHiddenPtrIdentity(kinds)[5]) {
10321case Arg::Tmp:
10322OPGEN_RETURN(true);
10323break;
10324break;
10325default:
10326break;
10327}
10328break;
10329default:
10330break;
10331}
10332break;
10333default:
10334break;
10335}
10336break;
10337default:
10338break;
10339}
10340break;
10341default:
10342break;
10343}
10344break;
10345default:
10346break;
10347}
10348break;
10349default:
10350break;
10351}
10352break;
10353case Opcode::MoveConditionallyTest64:
10354switch (sizeof...(Arguments)) {
10355case 5:
10356switch (opgenHiddenPtrIdentity(kinds)[0]) {
10357case Arg::ResCond:
10358switch (opgenHiddenPtrIdentity(kinds)[1]) {
10359case Arg::Tmp:
10360switch (opgenHiddenPtrIdentity(kinds)[2]) {
10361case Arg::Tmp:
10362switch (opgenHiddenPtrIdentity(kinds)[3]) {
10363case Arg::Tmp:
10364switch (opgenHiddenPtrIdentity(kinds)[4]) {
10365case Arg::Tmp:
10366#if CPU(X86_64) || CPU(ARM64)
10367OPGEN_RETURN(true);
10368#endif
10369break;
10370break;
10371default:
10372break;
10373}
10374break;
10375default:
10376break;
10377}
10378break;
10379case Arg::Imm:
10380switch (opgenHiddenPtrIdentity(kinds)[3]) {
10381case Arg::Tmp:
10382switch (opgenHiddenPtrIdentity(kinds)[4]) {
10383case Arg::Tmp:
10384#if CPU(X86_64)
10385OPGEN_RETURN(true);
10386#endif
10387break;
10388break;
10389default:
10390break;
10391}
10392break;
10393default:
10394break;
10395}
10396break;
10397default:
10398break;
10399}
10400break;
10401default:
10402break;
10403}
10404break;
10405default:
10406break;
10407}
10408break;
10409case 6:
10410switch (opgenHiddenPtrIdentity(kinds)[0]) {
10411case Arg::ResCond:
10412switch (opgenHiddenPtrIdentity(kinds)[1]) {
10413case Arg::Tmp:
10414switch (opgenHiddenPtrIdentity(kinds)[2]) {
10415case Arg::Tmp:
10416switch (opgenHiddenPtrIdentity(kinds)[3]) {
10417case Arg::Tmp:
10418switch (opgenHiddenPtrIdentity(kinds)[4]) {
10419case Arg::Tmp:
10420switch (opgenHiddenPtrIdentity(kinds)[5]) {
10421case Arg::Tmp:
10422#if CPU(X86_64) || CPU(ARM64)
10423OPGEN_RETURN(true);
10424#endif
10425break;
10426break;
10427default:
10428break;
10429}
10430break;
10431default:
10432break;
10433}
10434break;
10435default:
10436break;
10437}
10438break;
10439case Arg::Imm:
10440switch (opgenHiddenPtrIdentity(kinds)[3]) {
10441case Arg::Tmp:
10442switch (opgenHiddenPtrIdentity(kinds)[4]) {
10443case Arg::Tmp:
10444switch (opgenHiddenPtrIdentity(kinds)[5]) {
10445case Arg::Tmp:
10446#if CPU(X86_64)
10447OPGEN_RETURN(true);
10448#endif
10449break;
10450break;
10451default:
10452break;
10453}
10454break;
10455default:
10456break;
10457}
10458break;
10459default:
10460break;
10461}
10462break;
10463default:
10464break;
10465}
10466break;
10467default:
10468break;
10469}
10470break;
10471default:
10472break;
10473}
10474break;
10475default:
10476break;
10477}
10478break;
10479case Opcode::MoveConditionallyDouble:
10480switch (sizeof...(Arguments)) {
10481case 6:
10482switch (opgenHiddenPtrIdentity(kinds)[0]) {
10483case Arg::DoubleCond:
10484switch (opgenHiddenPtrIdentity(kinds)[1]) {
10485case Arg::Tmp:
10486switch (opgenHiddenPtrIdentity(kinds)[2]) {
10487case Arg::Tmp:
10488switch (opgenHiddenPtrIdentity(kinds)[3]) {
10489case Arg::Tmp:
10490switch (opgenHiddenPtrIdentity(kinds)[4]) {
10491case Arg::Tmp:
10492switch (opgenHiddenPtrIdentity(kinds)[5]) {
10493case Arg::Tmp:
10494OPGEN_RETURN(true);
10495break;
10496break;
10497default:
10498break;
10499}
10500break;
10501default:
10502break;
10503}
10504break;
10505default:
10506break;
10507}
10508break;
10509default:
10510break;
10511}
10512break;
10513default:
10514break;
10515}
10516break;
10517default:
10518break;
10519}
10520break;
10521case 5:
10522switch (opgenHiddenPtrIdentity(kinds)[0]) {
10523case Arg::DoubleCond:
10524switch (opgenHiddenPtrIdentity(kinds)[1]) {
10525case Arg::Tmp:
10526switch (opgenHiddenPtrIdentity(kinds)[2]) {
10527case Arg::Tmp:
10528switch (opgenHiddenPtrIdentity(kinds)[3]) {
10529case Arg::Tmp:
10530switch (opgenHiddenPtrIdentity(kinds)[4]) {
10531case Arg::Tmp:
10532OPGEN_RETURN(true);
10533break;
10534break;
10535default:
10536break;
10537}
10538break;
10539default:
10540break;
10541}
10542break;
10543default:
10544break;
10545}
10546break;
10547default:
10548break;
10549}
10550break;
10551default:
10552break;
10553}
10554break;
10555default:
10556break;
10557}
10558break;
10559case Opcode::MoveConditionallyFloat:
10560switch (sizeof...(Arguments)) {
10561case 6:
10562switch (opgenHiddenPtrIdentity(kinds)[0]) {
10563case Arg::DoubleCond:
10564switch (opgenHiddenPtrIdentity(kinds)[1]) {
10565case Arg::Tmp:
10566switch (opgenHiddenPtrIdentity(kinds)[2]) {
10567case Arg::Tmp:
10568switch (opgenHiddenPtrIdentity(kinds)[3]) {
10569case Arg::Tmp:
10570switch (opgenHiddenPtrIdentity(kinds)[4]) {
10571case Arg::Tmp:
10572switch (opgenHiddenPtrIdentity(kinds)[5]) {
10573case Arg::Tmp:
10574OPGEN_RETURN(true);
10575break;
10576break;
10577default:
10578break;
10579}
10580break;
10581default:
10582break;
10583}
10584break;
10585default:
10586break;
10587}
10588break;
10589default:
10590break;
10591}
10592break;
10593default:
10594break;
10595}
10596break;
10597default:
10598break;
10599}
10600break;
10601case 5:
10602switch (opgenHiddenPtrIdentity(kinds)[0]) {
10603case Arg::DoubleCond:
10604switch (opgenHiddenPtrIdentity(kinds)[1]) {
10605case Arg::Tmp:
10606switch (opgenHiddenPtrIdentity(kinds)[2]) {
10607case Arg::Tmp:
10608switch (opgenHiddenPtrIdentity(kinds)[3]) {
10609case Arg::Tmp:
10610switch (opgenHiddenPtrIdentity(kinds)[4]) {
10611case Arg::Tmp:
10612OPGEN_RETURN(true);
10613break;
10614break;
10615default:
10616break;
10617}
10618break;
10619default:
10620break;
10621}
10622break;
10623default:
10624break;
10625}
10626break;
10627default:
10628break;
10629}
10630break;
10631default:
10632break;
10633}
10634break;
10635default:
10636break;
10637}
10638break;
10639case Opcode::MoveDoubleConditionally32:
10640switch (sizeof...(Arguments)) {
10641case 6:
10642switch (opgenHiddenPtrIdentity(kinds)[0]) {
10643case Arg::RelCond:
10644switch (opgenHiddenPtrIdentity(kinds)[1]) {
10645case Arg::Tmp:
10646switch (opgenHiddenPtrIdentity(kinds)[2]) {
10647case Arg::Tmp:
10648switch (opgenHiddenPtrIdentity(kinds)[3]) {
10649case Arg::Tmp:
10650switch (opgenHiddenPtrIdentity(kinds)[4]) {
10651case Arg::Tmp:
10652switch (opgenHiddenPtrIdentity(kinds)[5]) {
10653case Arg::Tmp:
10654OPGEN_RETURN(true);
10655break;
10656break;
10657default:
10658break;
10659}
10660break;
10661default:
10662break;
10663}
10664break;
10665default:
10666break;
10667}
10668break;
10669case Arg::Imm:
10670switch (opgenHiddenPtrIdentity(kinds)[3]) {
10671case Arg::Tmp:
10672switch (opgenHiddenPtrIdentity(kinds)[4]) {
10673case Arg::Tmp:
10674switch (opgenHiddenPtrIdentity(kinds)[5]) {
10675case Arg::Tmp:
10676OPGEN_RETURN(true);
10677break;
10678break;
10679default:
10680break;
10681}
10682break;
10683default:
10684break;
10685}
10686break;
10687default:
10688break;
10689}
10690break;
10691case Arg::Addr:
10692case Arg::Stack:
10693case Arg::CallArg:
10694switch (opgenHiddenPtrIdentity(kinds)[3]) {
10695case Arg::Tmp:
10696switch (opgenHiddenPtrIdentity(kinds)[4]) {
10697case Arg::Tmp:
10698switch (opgenHiddenPtrIdentity(kinds)[5]) {
10699case Arg::Tmp:
10700#if CPU(X86) || CPU(X86_64)
10701OPGEN_RETURN(true);
10702#endif
10703break;
10704break;
10705default:
10706break;
10707}
10708break;
10709default:
10710break;
10711}
10712break;
10713default:
10714break;
10715}
10716break;
10717default:
10718break;
10719}
10720break;
10721case Arg::Addr:
10722case Arg::Stack:
10723case Arg::CallArg:
10724switch (opgenHiddenPtrIdentity(kinds)[2]) {
10725case Arg::Imm:
10726switch (opgenHiddenPtrIdentity(kinds)[3]) {
10727case Arg::Tmp:
10728switch (opgenHiddenPtrIdentity(kinds)[4]) {
10729case Arg::Tmp:
10730switch (opgenHiddenPtrIdentity(kinds)[5]) {
10731case Arg::Tmp:
10732#if CPU(X86) || CPU(X86_64)
10733OPGEN_RETURN(true);
10734#endif
10735break;
10736break;
10737default:
10738break;
10739}
10740break;
10741default:
10742break;
10743}
10744break;
10745default:
10746break;
10747}
10748break;
10749case Arg::Tmp:
10750switch (opgenHiddenPtrIdentity(kinds)[3]) {
10751case Arg::Tmp:
10752switch (opgenHiddenPtrIdentity(kinds)[4]) {
10753case Arg::Tmp:
10754switch (opgenHiddenPtrIdentity(kinds)[5]) {
10755case Arg::Tmp:
10756#if CPU(X86) || CPU(X86_64)
10757OPGEN_RETURN(true);
10758#endif
10759break;
10760break;
10761default:
10762break;
10763}
10764break;
10765default:
10766break;
10767}
10768break;
10769default:
10770break;
10771}
10772break;
10773default:
10774break;
10775}
10776break;
10777case Arg::Index:
10778switch (opgenHiddenPtrIdentity(kinds)[2]) {
10779case Arg::Imm:
10780switch (opgenHiddenPtrIdentity(kinds)[3]) {
10781case Arg::Tmp:
10782switch (opgenHiddenPtrIdentity(kinds)[4]) {
10783case Arg::Tmp:
10784switch (opgenHiddenPtrIdentity(kinds)[5]) {
10785case Arg::Tmp:
10786#if CPU(X86) || CPU(X86_64)
10787OPGEN_RETURN(true);
10788#endif
10789break;
10790break;
10791default:
10792break;
10793}
10794break;
10795default:
10796break;
10797}
10798break;
10799default:
10800break;
10801}
10802break;
10803default:
10804break;
10805}
10806break;
10807default:
10808break;
10809}
10810break;
10811default:
10812break;
10813}
10814break;
10815default:
10816break;
10817}
10818break;
10819case Opcode::MoveDoubleConditionally64:
10820switch (sizeof...(Arguments)) {
10821case 6:
10822switch (opgenHiddenPtrIdentity(kinds)[0]) {
10823case Arg::RelCond:
10824switch (opgenHiddenPtrIdentity(kinds)[1]) {
10825case Arg::Tmp:
10826switch (opgenHiddenPtrIdentity(kinds)[2]) {
10827case Arg::Tmp:
10828switch (opgenHiddenPtrIdentity(kinds)[3]) {
10829case Arg::Tmp:
10830switch (opgenHiddenPtrIdentity(kinds)[4]) {
10831case Arg::Tmp:
10832switch (opgenHiddenPtrIdentity(kinds)[5]) {
10833case Arg::Tmp:
10834#if CPU(X86_64) || CPU(ARM64)
10835OPGEN_RETURN(true);
10836#endif
10837break;
10838break;
10839default:
10840break;
10841}
10842break;
10843default:
10844break;
10845}
10846break;
10847default:
10848break;
10849}
10850break;
10851case Arg::Imm:
10852switch (opgenHiddenPtrIdentity(kinds)[3]) {
10853case Arg::Tmp:
10854switch (opgenHiddenPtrIdentity(kinds)[4]) {
10855case Arg::Tmp:
10856switch (opgenHiddenPtrIdentity(kinds)[5]) {
10857case Arg::Tmp:
10858#if CPU(X86_64) || CPU(ARM64)
10859OPGEN_RETURN(true);
10860#endif
10861break;
10862break;
10863default:
10864break;
10865}
10866break;
10867default:
10868break;
10869}
10870break;
10871default:
10872break;
10873}
10874break;
10875case Arg::Addr:
10876case Arg::Stack:
10877case Arg::CallArg:
10878switch (opgenHiddenPtrIdentity(kinds)[3]) {
10879case Arg::Tmp:
10880switch (opgenHiddenPtrIdentity(kinds)[4]) {
10881case Arg::Tmp:
10882switch (opgenHiddenPtrIdentity(kinds)[5]) {
10883case Arg::Tmp:
10884#if CPU(X86_64)
10885OPGEN_RETURN(true);
10886#endif
10887break;
10888break;
10889default:
10890break;
10891}
10892break;
10893default:
10894break;
10895}
10896break;
10897default:
10898break;
10899}
10900break;
10901default:
10902break;
10903}
10904break;
10905case Arg::Addr:
10906case Arg::Stack:
10907case Arg::CallArg:
10908switch (opgenHiddenPtrIdentity(kinds)[2]) {
10909case Arg::Tmp:
10910switch (opgenHiddenPtrIdentity(kinds)[3]) {
10911case Arg::Tmp:
10912switch (opgenHiddenPtrIdentity(kinds)[4]) {
10913case Arg::Tmp:
10914switch (opgenHiddenPtrIdentity(kinds)[5]) {
10915case Arg::Tmp:
10916#if CPU(X86_64)
10917OPGEN_RETURN(true);
10918#endif
10919break;
10920break;
10921default:
10922break;
10923}
10924break;
10925default:
10926break;
10927}
10928break;
10929default:
10930break;
10931}
10932break;
10933case Arg::Imm:
10934switch (opgenHiddenPtrIdentity(kinds)[3]) {
10935case Arg::Tmp:
10936switch (opgenHiddenPtrIdentity(kinds)[4]) {
10937case Arg::Tmp:
10938switch (opgenHiddenPtrIdentity(kinds)[5]) {
10939case Arg::Tmp:
10940#if CPU(X86_64)
10941OPGEN_RETURN(true);
10942#endif
10943break;
10944break;
10945default:
10946break;
10947}
10948break;
10949default:
10950break;
10951}
10952break;
10953default:
10954break;
10955}
10956break;
10957default:
10958break;
10959}
10960break;
10961case Arg::Index:
10962switch (opgenHiddenPtrIdentity(kinds)[2]) {
10963case Arg::Tmp:
10964switch (opgenHiddenPtrIdentity(kinds)[3]) {
10965case Arg::Tmp:
10966switch (opgenHiddenPtrIdentity(kinds)[4]) {
10967case Arg::Tmp:
10968switch (opgenHiddenPtrIdentity(kinds)[5]) {
10969case Arg::Tmp:
10970#if CPU(X86_64)
10971OPGEN_RETURN(true);
10972#endif
10973break;
10974break;
10975default:
10976break;
10977}
10978break;
10979default:
10980break;
10981}
10982break;
10983default:
10984break;
10985}
10986break;
10987default:
10988break;
10989}
10990break;
10991default:
10992break;
10993}
10994break;
10995default:
10996break;
10997}
10998break;
10999default:
11000break;
11001}
11002break;
11003case Opcode::MoveDoubleConditionallyTest32:
11004switch (sizeof...(Arguments)) {
11005case 6:
11006switch (opgenHiddenPtrIdentity(kinds)[0]) {
11007case Arg::ResCond:
11008switch (opgenHiddenPtrIdentity(kinds)[1]) {
11009case Arg::Tmp:
11010switch (opgenHiddenPtrIdentity(kinds)[2]) {
11011case Arg::Tmp:
11012switch (opgenHiddenPtrIdentity(kinds)[3]) {
11013case Arg::Tmp:
11014switch (opgenHiddenPtrIdentity(kinds)[4]) {
11015case Arg::Tmp:
11016switch (opgenHiddenPtrIdentity(kinds)[5]) {
11017case Arg::Tmp:
11018OPGEN_RETURN(true);
11019break;
11020break;
11021default:
11022break;
11023}
11024break;
11025default:
11026break;
11027}
11028break;
11029default:
11030break;
11031}
11032break;
11033case Arg::BitImm:
11034switch (opgenHiddenPtrIdentity(kinds)[3]) {
11035case Arg::Tmp:
11036switch (opgenHiddenPtrIdentity(kinds)[4]) {
11037case Arg::Tmp:
11038switch (opgenHiddenPtrIdentity(kinds)[5]) {
11039case Arg::Tmp:
11040OPGEN_RETURN(true);
11041break;
11042break;
11043default:
11044break;
11045}
11046break;
11047default:
11048break;
11049}
11050break;
11051default:
11052break;
11053}
11054break;
11055default:
11056break;
11057}
11058break;
11059case Arg::Addr:
11060case Arg::Stack:
11061case Arg::CallArg:
11062switch (opgenHiddenPtrIdentity(kinds)[2]) {
11063case Arg::Imm:
11064switch (opgenHiddenPtrIdentity(kinds)[3]) {
11065case Arg::Tmp:
11066switch (opgenHiddenPtrIdentity(kinds)[4]) {
11067case Arg::Tmp:
11068switch (opgenHiddenPtrIdentity(kinds)[5]) {
11069case Arg::Tmp:
11070#if CPU(X86) || CPU(X86_64)
11071OPGEN_RETURN(true);
11072#endif
11073break;
11074break;
11075default:
11076break;
11077}
11078break;
11079default:
11080break;
11081}
11082break;
11083default:
11084break;
11085}
11086break;
11087default:
11088break;
11089}
11090break;
11091case Arg::Index:
11092switch (opgenHiddenPtrIdentity(kinds)[2]) {
11093case Arg::Imm:
11094switch (opgenHiddenPtrIdentity(kinds)[3]) {
11095case Arg::Tmp:
11096switch (opgenHiddenPtrIdentity(kinds)[4]) {
11097case Arg::Tmp:
11098switch (opgenHiddenPtrIdentity(kinds)[5]) {
11099case Arg::Tmp:
11100#if CPU(X86) || CPU(X86_64)
11101OPGEN_RETURN(true);
11102#endif
11103break;
11104break;
11105default:
11106break;
11107}
11108break;
11109default:
11110break;
11111}
11112break;
11113default:
11114break;
11115}
11116break;
11117default:
11118break;
11119}
11120break;
11121default:
11122break;
11123}
11124break;
11125default:
11126break;
11127}
11128break;
11129default:
11130break;
11131}
11132break;
11133case Opcode::MoveDoubleConditionallyTest64:
11134switch (sizeof...(Arguments)) {
11135case 6:
11136switch (opgenHiddenPtrIdentity(kinds)[0]) {
11137case Arg::ResCond:
11138switch (opgenHiddenPtrIdentity(kinds)[1]) {
11139case Arg::Tmp:
11140switch (opgenHiddenPtrIdentity(kinds)[2]) {
11141case Arg::Tmp:
11142switch (opgenHiddenPtrIdentity(kinds)[3]) {
11143case Arg::Tmp:
11144switch (opgenHiddenPtrIdentity(kinds)[4]) {
11145case Arg::Tmp:
11146switch (opgenHiddenPtrIdentity(kinds)[5]) {
11147case Arg::Tmp:
11148#if CPU(X86_64) || CPU(ARM64)
11149OPGEN_RETURN(true);
11150#endif
11151break;
11152break;
11153default:
11154break;
11155}
11156break;
11157default:
11158break;
11159}
11160break;
11161default:
11162break;
11163}
11164break;
11165case Arg::Imm:
11166switch (opgenHiddenPtrIdentity(kinds)[3]) {
11167case Arg::Tmp:
11168switch (opgenHiddenPtrIdentity(kinds)[4]) {
11169case Arg::Tmp:
11170switch (opgenHiddenPtrIdentity(kinds)[5]) {
11171case Arg::Tmp:
11172#if CPU(X86_64)
11173OPGEN_RETURN(true);
11174#endif
11175break;
11176break;
11177default:
11178break;
11179}
11180break;
11181default:
11182break;
11183}
11184break;
11185default:
11186break;
11187}
11188break;
11189default:
11190break;
11191}
11192break;
11193case Arg::Addr:
11194case Arg::Stack:
11195case Arg::CallArg:
11196switch (opgenHiddenPtrIdentity(kinds)[2]) {
11197case Arg::Imm:
11198switch (opgenHiddenPtrIdentity(kinds)[3]) {
11199case Arg::Tmp:
11200switch (opgenHiddenPtrIdentity(kinds)[4]) {
11201case Arg::Tmp:
11202switch (opgenHiddenPtrIdentity(kinds)[5]) {
11203case Arg::Tmp:
11204#if CPU(X86_64)
11205OPGEN_RETURN(true);
11206#endif
11207break;
11208break;
11209default:
11210break;
11211}
11212break;
11213default:
11214break;
11215}
11216break;
11217default:
11218break;
11219}
11220break;
11221case Arg::Tmp:
11222switch (opgenHiddenPtrIdentity(kinds)[3]) {
11223case Arg::Tmp:
11224switch (opgenHiddenPtrIdentity(kinds)[4]) {
11225case Arg::Tmp:
11226switch (opgenHiddenPtrIdentity(kinds)[5]) {
11227case Arg::Tmp:
11228#if CPU(X86_64)
11229OPGEN_RETURN(true);
11230#endif
11231break;
11232break;
11233default:
11234break;
11235}
11236break;
11237default:
11238break;
11239}
11240break;
11241default:
11242break;
11243}
11244break;
11245default:
11246break;
11247}
11248break;
11249case Arg::Index:
11250switch (opgenHiddenPtrIdentity(kinds)[2]) {
11251case Arg::Imm:
11252switch (opgenHiddenPtrIdentity(kinds)[3]) {
11253case Arg::Tmp:
11254switch (opgenHiddenPtrIdentity(kinds)[4]) {
11255case Arg::Tmp:
11256switch (opgenHiddenPtrIdentity(kinds)[5]) {
11257case Arg::Tmp:
11258#if CPU(X86_64)
11259OPGEN_RETURN(true);
11260#endif
11261break;
11262break;
11263default:
11264break;
11265}
11266break;
11267default:
11268break;
11269}
11270break;
11271default:
11272break;
11273}
11274break;
11275default:
11276break;
11277}
11278break;
11279default:
11280break;
11281}
11282break;
11283default:
11284break;
11285}
11286break;
11287default:
11288break;
11289}
11290break;
11291case Opcode::MoveDoubleConditionallyDouble:
11292switch (sizeof...(Arguments)) {
11293case 6:
11294switch (opgenHiddenPtrIdentity(kinds)[0]) {
11295case Arg::DoubleCond:
11296switch (opgenHiddenPtrIdentity(kinds)[1]) {
11297case Arg::Tmp:
11298switch (opgenHiddenPtrIdentity(kinds)[2]) {
11299case Arg::Tmp:
11300switch (opgenHiddenPtrIdentity(kinds)[3]) {
11301case Arg::Tmp:
11302switch (opgenHiddenPtrIdentity(kinds)[4]) {
11303case Arg::Tmp:
11304switch (opgenHiddenPtrIdentity(kinds)[5]) {
11305case Arg::Tmp:
11306OPGEN_RETURN(true);
11307break;
11308break;
11309default:
11310break;
11311}
11312break;
11313default:
11314break;
11315}
11316break;
11317default:
11318break;
11319}
11320break;
11321default:
11322break;
11323}
11324break;
11325default:
11326break;
11327}
11328break;
11329default:
11330break;
11331}
11332break;
11333default:
11334break;
11335}
11336break;
11337case Opcode::MoveDoubleConditionallyFloat:
11338switch (sizeof...(Arguments)) {
11339case 6:
11340switch (opgenHiddenPtrIdentity(kinds)[0]) {
11341case Arg::DoubleCond:
11342switch (opgenHiddenPtrIdentity(kinds)[1]) {
11343case Arg::Tmp:
11344switch (opgenHiddenPtrIdentity(kinds)[2]) {
11345case Arg::Tmp:
11346switch (opgenHiddenPtrIdentity(kinds)[3]) {
11347case Arg::Tmp:
11348switch (opgenHiddenPtrIdentity(kinds)[4]) {
11349case Arg::Tmp:
11350switch (opgenHiddenPtrIdentity(kinds)[5]) {
11351case Arg::Tmp:
11352OPGEN_RETURN(true);
11353break;
11354break;
11355default:
11356break;
11357}
11358break;
11359default:
11360break;
11361}
11362break;
11363default:
11364break;
11365}
11366break;
11367default:
11368break;
11369}
11370break;
11371default:
11372break;
11373}
11374break;
11375default:
11376break;
11377}
11378break;
11379default:
11380break;
11381}
11382break;
11383case Opcode::MemoryFence:
11384switch (sizeof...(Arguments)) {
11385case 0:
11386OPGEN_RETURN(true);
11387break;
11388break;
11389default:
11390break;
11391}
11392break;
11393case Opcode::StoreFence:
11394switch (sizeof...(Arguments)) {
11395case 0:
11396OPGEN_RETURN(true);
11397break;
11398break;
11399default:
11400break;
11401}
11402break;
11403case Opcode::LoadFence:
11404switch (sizeof...(Arguments)) {
11405case 0:
11406OPGEN_RETURN(true);
11407break;
11408break;
11409default:
11410break;
11411}
11412break;
11413case Opcode::Jump:
11414switch (sizeof...(Arguments)) {
11415case 0:
11416OPGEN_RETURN(true);
11417break;
11418break;
11419default:
11420break;
11421}
11422break;
11423case Opcode::RetVoid:
11424switch (sizeof...(Arguments)) {
11425case 0:
11426OPGEN_RETURN(true);
11427break;
11428break;
11429default:
11430break;
11431}
11432break;
11433case Opcode::Ret32:
11434switch (sizeof...(Arguments)) {
11435case 1:
11436switch (opgenHiddenPtrIdentity(kinds)[0]) {
11437case Arg::Tmp:
11438OPGEN_RETURN(true);
11439break;
11440break;
11441default:
11442break;
11443}
11444break;
11445default:
11446break;
11447}
11448break;
11449case Opcode::Ret64:
11450switch (sizeof...(Arguments)) {
11451case 1:
11452switch (opgenHiddenPtrIdentity(kinds)[0]) {
11453case Arg::Tmp:
11454#if CPU(X86_64) || CPU(ARM64)
11455OPGEN_RETURN(true);
11456#endif
11457break;
11458break;
11459default:
11460break;
11461}
11462break;
11463default:
11464break;
11465}
11466break;
11467case Opcode::RetFloat:
11468switch (sizeof...(Arguments)) {
11469case 1:
11470switch (opgenHiddenPtrIdentity(kinds)[0]) {
11471case Arg::Tmp:
11472OPGEN_RETURN(true);
11473break;
11474break;
11475default:
11476break;
11477}
11478break;
11479default:
11480break;
11481}
11482break;
11483case Opcode::RetDouble:
11484switch (sizeof...(Arguments)) {
11485case 1:
11486switch (opgenHiddenPtrIdentity(kinds)[0]) {
11487case Arg::Tmp:
11488OPGEN_RETURN(true);
11489break;
11490break;
11491default:
11492break;
11493}
11494break;
11495default:
11496break;
11497}
11498break;
11499case Opcode::Oops:
11500switch (sizeof...(Arguments)) {
11501case 0:
11502OPGEN_RETURN(true);
11503break;
11504break;
11505default:
11506break;
11507}
11508break;
11509case Opcode::EntrySwitch:
11510OPGEN_RETURN(EntrySwitchCustom::isValidFormStatic(arguments...));
11511break;
11512case Opcode::Shuffle:
11513OPGEN_RETURN(ShuffleCustom::isValidFormStatic(arguments...));
11514break;
11515case Opcode::Patch:
11516OPGEN_RETURN(PatchCustom::isValidFormStatic(arguments...));
11517break;
11518case Opcode::CCall:
11519OPGEN_RETURN(CCallCustom::isValidFormStatic(arguments...));
11520break;
11521case Opcode::ColdCCall:
11522OPGEN_RETURN(ColdCCallCustom::isValidFormStatic(arguments...));
11523break;
11524case Opcode::WasmBoundsCheck:
11525OPGEN_RETURN(WasmBoundsCheckCustom::isValidFormStatic(arguments...));
11526break;
11527default:
11528break;
11529}
11530return false;
11531}
11532inline bool isDefinitelyTerminal(Opcode opcode)
11533{
11534switch (opcode) {
11535case Opcode::BranchAtomicStrongCAS8:
11536case Opcode::BranchAtomicStrongCAS16:
11537case Opcode::BranchAtomicStrongCAS32:
11538case Opcode::BranchAtomicStrongCAS64:
11539case Opcode::Branch8:
11540case Opcode::Branch32:
11541case Opcode::Branch64:
11542case Opcode::BranchTest8:
11543case Opcode::BranchTest32:
11544case Opcode::BranchTest64:
11545case Opcode::BranchTestBit64:
11546case Opcode::BranchTestBit32:
11547case Opcode::BranchDouble:
11548case Opcode::BranchFloat:
11549case Opcode::BranchAdd32:
11550case Opcode::BranchAdd64:
11551case Opcode::BranchMul32:
11552case Opcode::BranchMul64:
11553case Opcode::BranchSub32:
11554case Opcode::BranchSub64:
11555case Opcode::BranchNeg32:
11556case Opcode::BranchNeg64:
11557case Opcode::Jump:
11558case Opcode::RetVoid:
11559case Opcode::Ret32:
11560case Opcode::Ret64:
11561case Opcode::RetFloat:
11562case Opcode::RetDouble:
11563case Opcode::Oops:
11564return true;
11565default:
11566return false;
11567}
11568}
11569inline bool isReturn(Opcode opcode)
11570{
11571switch (opcode) {
11572case Opcode::RetVoid:
11573case Opcode::Ret32:
11574case Opcode::Ret64:
11575case Opcode::RetFloat:
11576case Opcode::RetDouble:
11577return true;
11578default:
11579return false;
11580}
11581}
11582} } } // namespace JSC::B3::Air
11583#endif // AirOpcodeUtils_h
11584