1// Copyright 2018 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#ifndef V8_CPU_FEATURES_H_
6#define V8_CPU_FEATURES_H_
7
8#include "src/globals.h"
9
10namespace v8 {
11
12namespace internal {
13
14// CPU feature flags.
15enum CpuFeature {
16 // x86
17 SSE4_1,
18 SSSE3,
19 SSE3,
20 SAHF,
21 AVX,
22 FMA3,
23 BMI1,
24 BMI2,
25 LZCNT,
26 POPCNT,
27 ATOM,
28 // ARM
29 // - Standard configurations. The baseline is ARMv6+VFPv2.
30 ARMv7, // ARMv7-A + VFPv3-D32 + NEON
31 ARMv7_SUDIV, // ARMv7-A + VFPv4-D32 + NEON + SUDIV
32 ARMv8, // ARMv8-A (+ all of the above)
33 // MIPS, MIPS64
34 FPU,
35 FP64FPU,
36 MIPSr1,
37 MIPSr2,
38 MIPSr6,
39 MIPS_SIMD, // MSA instructions
40 // PPC
41 FPR_GPR_MOV,
42 LWSYNC,
43 ISELECT,
44 VSX,
45 MODULO,
46 // S390
47 DISTINCT_OPS,
48 GENERAL_INSTR_EXT,
49 FLOATING_POINT_EXT,
50 VECTOR_FACILITY,
51 MISC_INSTR_EXT2,
52
53 NUMBER_OF_CPU_FEATURES,
54
55 // ARM feature aliases (based on the standard configurations above).
56 VFPv3 = ARMv7,
57 NEON = ARMv7,
58 VFP32DREGS = ARMv7,
59 SUDIV = ARMv7_SUDIV
60};
61
62// CpuFeatures keeps track of which features are supported by the target CPU.
63// Supported features must be enabled by a CpuFeatureScope before use.
64// Example:
65// if (assembler->IsSupported(SSE3)) {
66// CpuFeatureScope fscope(assembler, SSE3);
67// // Generate code containing SSE3 instructions.
68// } else {
69// // Generate alternative code.
70// }
71class V8_EXPORT_PRIVATE CpuFeatures : public AllStatic {
72 public:
73 static void Probe(bool cross_compile) {
74 STATIC_ASSERT(NUMBER_OF_CPU_FEATURES <= kBitsPerInt);
75 if (initialized_) return;
76 initialized_ = true;
77 ProbeImpl(cross_compile);
78 }
79
80 static unsigned SupportedFeatures() {
81 Probe(false);
82 return supported_;
83 }
84
85 static bool IsSupported(CpuFeature f) {
86 return (supported_ & (1u << f)) != 0;
87 }
88
89 static inline bool SupportsOptimizer();
90
91 static inline bool SupportsWasmSimd128();
92
93 static inline unsigned icache_line_size() {
94 DCHECK_NE(icache_line_size_, 0);
95 return icache_line_size_;
96 }
97
98 static inline unsigned dcache_line_size() {
99 DCHECK_NE(dcache_line_size_, 0);
100 return dcache_line_size_;
101 }
102
103 static void PrintTarget();
104 static void PrintFeatures();
105
106 private:
107 friend void V8_EXPORT_PRIVATE FlushInstructionCache(void*, size_t);
108 friend class ExternalReference;
109 // Flush instruction cache.
110 static void FlushICache(void* start, size_t size);
111
112 // Platform-dependent implementation.
113 static void ProbeImpl(bool cross_compile);
114
115 static unsigned supported_;
116 static unsigned icache_line_size_;
117 static unsigned dcache_line_size_;
118 static bool initialized_;
119 DISALLOW_COPY_AND_ASSIGN(CpuFeatures);
120};
121
122} // namespace internal
123} // namespace v8
124#endif // V8_CPU_FEATURES_H_
125